Samsung Electronics Co., Ltd.

Jinman Han

Kitae Park

Sangyong Yoon

Donghyuk Chae

Doogon Kim

Hansoo Kim

Sunil Shim

Wonseok Lee

Hong Rak Son

Junjin Kong

Changhyun Lee

Byoungkeun Son

Jae-Hoon Jang

Sunghoi Hur

Jeongdon Ihm

Pilsang Yoon

Young-Seop Shim

Kilsoo Kim

Ho-Chul Lee

Dongsup Jin

Youngjin Jeon

Jongin Yun

Sang-Wan Nam

Min-Su Kim

Jaehoon Jang

Chiweon Yoon

Dongku Kang

Junghoon Park

Doohyun Kim

Donghun Kwak

Sangwan Nam

Jaehun Jeong

Sang-Hyun Joo

Sang-Won Park

Sun-Il Shim

Won-Taeck Jung

Youngho Lim

Jung-Yun Yun

BoGeun Kim

Joon Young Kwak

Nonvolatile memory device, operating methods thereof, and memory systems including the same. In the operating method, a ground select line of a first string connected to a bit line may be floated. An erase prohibition voltage may be applied to a ground select line of a second string connected to the bit line. An erase operation voltage may be applied to the first and second strings.

Nonvolatile memory devices, operating methods thereof and memory systems including the same

A method for controlling a nonvolatile memory device includes requesting a plurality of first sampling values from the nonvolatile memory device, each of the first sampling values representing the number of memory cells having a threshold voltage between a first sampling read voltage and a second sampling read voltage. The first sampling values are processed through a non-linear filtering operation to estimate the number of memory cells having the threshold voltage between the first sampling read voltage and the second sampling read voltage.

Memory system using non-linear filtering scheme and read method thereof

Memory systems are provided. A memory system may include a plurality of nonvolatile memories and a memory controller configured to control the plurality of nonvolatile memories. Moreover, the memory system may include an input/output buffer circuit connected between the memory controller and the plurality of nonvolatile memories. A data channel may be connected between the memory controller and the input/output buffer circuit, and first and second internal data channels may be connected between the input/output buffer circuit and respective first and second groups of the plurality of nonvolatile memories. The input/output buffer circuit may be configured to connect the data channel to one of the first and second internal data channels.

Memory systems including an input/output buffer circuit

In one embodiment, the method includes determining whether a selection transistor of a currently programmed memory string in the memory has deteriorated, and copying data in the currently programmed memory string to a different memory string of the memory if the determining determines the selection transistor has deteriorated.

Method of managing a memory, and a memory system

According to example embodiments, a method of operating a storage device includes reading a process capability index using a memory controller, adjusting at least one operation condition based on the process capability index, and operating one of at least one nonvolatile memory device according to the at least one operation condition adjusted. The process capability index indicates how a structure associated with a memory cell to be operated deviates from a target shape.

Nonvolatile memory device and storage device having the same and operation method thereof

Systems and methods of sequentially accessing memory cells in a nonvolatile memory device (NVM) are provided. The NVM has a plurality of strings and a common signal line coupled to the plurality of strings. Each string includes a plurality of memory cells and a selection transistor coupled between the plurality of memory cells and the common signal line. A command that accesses multiple memory cells is received, a voltage is applied to a first selection transistor of a first string to electrically connect the common signal line to the first string, a pulse is applied for a predetermined time period to selection transistors of other strings, and memory cells of the first string are accessed. Advantages such as removal of boosting charges from unselected strings prior to sequentially accessing memory cells from selected strings can improve performance and reliability of NVM-based systems.

Sequentially accessing memory cells in a memory device

The inventive concept relates to a nonvolatile memory device and methods for operating the same. The nonvolatile memory device comprises a plurality of strings arranged in rows and columns on a substrate, each string including at least one ground select transistor, a plurality of memory cells and at least one string select transistor sequentially stacked on the substrate. The method comprises erasing first memory cells corresponding to an erasure failed row and inhibiting erasure of second memory cells corresponding to an erasure passed row, and performing an erasure verification by a unit of each row with respect to the first memory cells.

Methods of operating memory systems and nonvolatile memory devices include performing error checking and correction (ECC) operations on M pages of data read from a first 'source' portion of M-bit nonvolatile memory cells within the nonvolatile memory device to thereby generate M pages of ECC-processed data, where M is a positive integer greater than two (2). A second 'target' portion of M-bit nonvolatile memory cells within the nonvolatile memory device is then programmed with the M pages of ECC-processed data using an address-scrambled reprogramming technique, for example.

Memory systems and block copy methods thereof

Integrated circuit memory devices include an array of nonvolatile N-bit memory cells, where N is an integer greater than one. Control circuitry is also provided to reliably read data from the N-bit memory cells. This control circuitry, which is electrically coupled to the array, is configured to determine, among other things, a value of at least one bit of data stored in a selected N-bit memory cell in the array. This is done by decoding at least one hard data value and a plurality of soft data values (e.g., 6 data values) read from the selected N-bit memory cell using a corresponding plurality of unequal read voltages applied to the selected N-bit memory cell during a read operation.

Flash memory devices having multi-bit memory cells therein with improved read reliability

Methods of operating memory systems and nonvolatile memory devices include performing error checking and correction (ECC) operations on M pages of data read from a first 'source' portion of M-bit nonvolatile memory cells within the nonvolatile memory device to thereby generate M pages of ECC-processed data, where M is a positive integer greater than two (). A second 'target' portion of M-bit nonvolatile memory cells within the nonvolatile memory device is then programmed with the M pages of ECC-processed data using, for example, an address-scrambled reprogramming technique.

Growing community of inventors

Seongnam-si, South Korea

Jinman Han