United Semiconductor (xiamen) Co., Ltd.

Jinjian Ouyang

Wen Yi Tan

Chin-Chun Huang

Linshan Yuan

Guang Yang

Xiang Bo Kong

Dejin Kong

Yun-Pin Teng

Jiawei Lyu

Hui Feng Chen

Yuchun Guo

A resistive random access memory includes a first dielectric layer, a bottom electrode on the first dielectric layer, a variable-resistance layer on the bottom electrode and having a U-shaped cross-sectional profile, a top electrode on the variable-resistance layer and filling a recess in the variable-resistance layer, a second dielectric layer on the first dielectric layer and around the variable-resistance layer and the bottom electrode, and a spacer on the bottom electrode and inserting between the variable-resistance layer and the second dielectric layer.

Resistive random access memory and method of forming the same

A method for fabricating a semiconductor device is disclosed. A substrate having thereon at least one metal-oxide-semiconductor (MOS) transistor is provided. A stress memorization technique (SMT) process is performed. The SMT process includes steps of depositing an SMT film covering the at least one MOS transistor on the substrate, and subjecting the SMT film to a thermal process. A lithographic process and an etching process are performed to form a patterned SMT film. A silicide layer is formed on the MOS transistor. The patterned SMT film acts as a salicide block layer when forming the silicide layer.

Method for making semiconductor device using a stress memorization technique

A resistive random access memory includes a bottom electrode, a variable-resistance layer on the bottom electrode and having a U-shaped cross-sectional profile, and a top electrode on the variable-resistance layer and filling a recess in the variable-resistance layer.

The invention provides a semiconductor testkey pattern, the semiconductor testkey pattern includes a high density device region and a plurality of resistor pairs surrounding the high density device region, wherein each resistor pair includes two mutually symmetrical resistor patterns.

Semiconductor testkey pattern and test method thereof

A radiofrequency device includes a semiconductor substrate, an inductor structure, a shielding structure, and a mask pattern. The semiconductor substrate includes a first region and a second region. The inductor structure is disposed on the first region of the semiconductor substrate. The shielding structure is disposed on the first region of the semiconductor substrate and located between the inductor structure and the semiconductor substrate in a vertical direction. The mask pattern is disposed on the semiconductor substrate. A first portion of the mask pattern is disposed on the shielding structure and directly contacts the shielding structure, and a top surface of the shielding structure is completely covered by the first portion of the mask pattern.

Radiofrequency device

An RRAM structure includes a substrate. An RRAM is embedded in the substrate. The RRAM includes a bottom electrode, a metal oxide layer and a top electrode. A first doped region is embedded in the substrate and surrounds the bottom electrode. A transistor is disposed on the substrate and at one side of the RRAM. The transistor includes a gate structure on the substrate. A source is disposed in the substrate and at one side of the gate structure. A drain is disposed in the substrate and at another side of the gate structure. The first doped region contacts the drain.

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Fujian, China

Jinjian Ouyang