Samsung Electronics Co., Ltd.

JinGyun Kim

Myoungbum Lee

Soodoo Chae

Kihyun Kim

Hansoo Kim

Kihyun Hwang

Siyoung Choi

Hoosung Cho

HuiChang Moon

Seungmok Shin

Daehyun Jang

Daehong Eom

Sunghae Lee

Dongwoo Kim

Jung Ho Kim

Yong-Hoon Son

Woong Hee Lee

Phil Ouk Nam

Dongchul Yoo

Woosung Lee

Junkyu Yang

Sangryol Yang

Ju-Eun Kim

Kyunghyun Kim

Seung-Yup Lee

Se-Ho Cha

Jun-Youl Yang

Chadong Yeo

Seongsoo Lee

Yeon-Sil Sohn

Kyung-Tae Jang

Dae-Hun Choi

Chae Soodoo

A three-dimensional nonvolatile memory device and a method for fabricating the same include a semiconductor substrate, a plurality of active pillars, a plurality of gate electrodes, and a plurality of supporters. The semiconductor substrate includes a memory cell region and a contact region. The active pillars extend in the memory cell region perpendicularly to the semiconductor substrate. The gate electrodes intersect the active pillars, extend from the memory cell region to the contact region and are stacked on the semiconductor substrate. The supporters extend in the contact region perpendicularly to the semiconductor substrate to penetrate at least one or more of the gate electrodes.

Nonvolatile memory device and method for fabricating the same

Semiconductor memory devices and methods of forming semiconductor memory devices are provided. The methods may include forming insulation layers and cell gate layers that are alternately stacked on a substrate, forming an opening by successively patterning through the cell gate layers and the insulation layers, and forming selectively conductive barriers on sidewalls of the cell gate layers in the opening.

Semiconductor memory device having insulation patterns and cell gate patterns

Three dimensional semiconductor memory devices and methods of fabricating the same are provided. According to the method, sacrificial layers and insulating layers are alternately and repeatedly stacked on a substrate, and a cutting region penetrating an uppermost sacrificial layer of the sacrificial layers is formed. The cutting region is filled with a non sacrificial layer. The insulating layers and the sacrificial layers are patterned to form a mold pattern. The mold pattern includes insulating patterns, sacrificial patterns, and the non sacrificial layer in the cutting region. The sacrificial patterns may be replaced with electrodes. The related semiconductor memory device is also provided.

Methods of fabricating three-dimensional semiconductor devices

A three-dimensional (3D) semiconductor memory device and a method for fabricating the same, the device including insulating layers stacked on a substrate; horizontal structures between the insulating layers, the horizontal structures including gate electrodes, respectively; vertical structures penetrating the insulating layers and the horizontal structures, the vertical structures including semiconductor pillars, respectively; and epitaxial patterns, each of the epitaxial patterns being between the substrate and each of the vertical structures, wherein a minimum width of the epitaxial pattern is less than a width of a corresponding one of the vertical structures.

Three-dimensional semiconductor memory device and method for fabricating the same

A method of fabricating a semiconductor device including forming a charge storage layer, and forming a first tunnel insulating layer covering the charge storage layer, the forming of the first tunnel insulating layer including heat treating the charge storage layer.

Semiconductor device

Three-dimensional semiconductor memory device

Methods of forming semiconductor devices may be provided. A method of forming a semiconductor device may include patterning first and second material layers to form a first through region exposing a substrate. The method may include forming a first semiconductor layer in the first through region on the substrate and on sidewalls of the first and second material layers. In some embodiments, the method may include forming a buried layer filling the first through region on the first semiconductor layer. In some embodiments, the method may include removing a portion of the buried layer to form a second through region between the sidewalls of the first and second material layers. Moreover, the method may include forming a second semiconductor layer in the second through region.

Semiconductor memory devices and methods of forming the same

Methods of manufacturing a three-dimensional semiconductor device are provided. The method includes: forming a thin film structure, where first and second material layers of at least 2n (n is an integer more than 2) are alternately and repeatedly stacked, on a substrate; wherein the first material layer applies a stress in a range of about 0.1&#xd7;109 dyne/cmto about 10&#xd7;109 dyne/cmto the substrate and the second material layer applies a stress in a range of about &#x2212;0.1&#xd7;109 dyne/cmto about &#x2212;10&#xd7;109 dyne/cmto the substrate.

Methods of manufacturing three-dimensional semiconductor memory devices

Method of fabricating semiconductor device

Growing community of inventors

Yongin-si, South Korea

JinGyun Kim