Sandisk 3d LLC

Micron Technology Incorporated

Arm Limited

Cerfe Labs, Inc.

Jingyan Zhang

Er-Xuan Ping

April Dawn Schricker

Franz Kreupl

Raghuveer S Makala

Paul Raymond Besser

Ming He

Huiwen Xu

Chu-Chen Fu

Manuj Rathor

Utthaman Thirunavukkarasu

Roy E Scheuerlein

James K Kai

Peter Rabkin

Tanmay Kumar

George Samachisa

Yung-Tin Chen

Wipul Jayasekara

Wu-Yi Henry Chien

Abhijit Bandyopadhyay

Kun Hou

Li Xiao

Pankaj Kalra

Yubao Li

Yibo Nian

Huicai Zhong

Wipul Pemsiri Jayasekara

Subject matter disclosed herein may relate to fabrication of a correlated electron material (CEM) switch. In particular embodiments, an insulative material may be formed on or over a sidewall portion of a conductive contact region. The insulative material may insulate the conductive contact region from resputtered CEM occurring during a physical etch of a CEM film.

Correlated electron material (CEM) devices with contact region sidewall insulation

Subject matter disclosed herein may relate to fabrication of a correlated electron material (CEM) switch. In particular embodiments a method may include forming a structure on a first portion of a substrate while maintaining a second portion of the substrate exposed. A sealing layer may be deposited over the structure and over at least a portion of the exposed second portion of the substrate. A conductive via may be formed by way of a dry etch through the sealing layer to contact the exposed metal layer. In embodiments, an etch-stop control layer may be utilized to control an etching process prior to formation of metal contacts over the CEM switch and the conductive via.

Fabrication of correlated electron material (CEM) devices

Methods of cleaning substrates and growing epitaxial silicon thereon are provided. Wafers are exposed to a plasma for a sufficient time prior to epitaxial silicon growth, in order to clean the wafers. The methods exhibit enhanced selectivity and reduced lateral growth of epitaxial silicon. The wafers may have dielectric areas that are passivated by the exposure of the wafer to a plasma.

Methods for epitaxial silicon growth

A reversible resistance-switching metal-insulator-metal (MIM) stack is provided which can be set to a low resistance state with a first polarity signal and reset to a higher resistance state with a second polarity signal. The first polarity signal is opposite in polarity than the second polarity signal. In one approach, the MIM stack includes a carbon-based reversible resistivity switching material such as a carbon nanotube material. The MIM stack can further include one or more additional reversible resistivity switching materials such as metal oxide above and/or below the carbon-based reversible resistivity switching material. In another approach, a metal oxide layer is between separate layers of carbon-based reversible resistivity switching material.

Non-volatile storage system using opposite polarity programming signals for MIM memory cell

In some aspects, a method of fabricating a memory cell is provided that includes fabricating a steering element above a substrate, and fabricating a reversible-resistance switching element coupled to the steering element by selectively fabricating carbon nano-tube ('CNT') material above the substrate, wherein the CNT material comprises a single CNT. Numerous other aspects are provided.

Memory cell that employs a selectively fabricated carbon nano-tube reversible resistance-switching element and methods of forming the same

A method of forming a reversible resistance-switching metal-insulator-metal structure is provided, the method including forming a first non-metallic conducting layer, forming a non-conducting layer above the first non-metallic conducting layer, forming a second non-metallic conducting layer above the non-conducting layer, etching the first non-metallic conducting layer, non-conducting layer and second non-metallic conducting layer to form a pillar, and disposing a carbon material layer about a sidewall of the pillar. Other aspects are also provided.

Methods of forming a reversible resistance-switching metal-insulator-metal structure

A method of programming a nonvolatile memory cell. The nonvolatile memory cell includes a diode steering element in series with a carbon storage element The method includes providing a first voltage to the nonvolatile memory cell. The first voltage reverse biases the diode steering element. The carbon storage element sets to a lower resistivity state.

Method of programming a nonvolatile memory cell by reverse biasing a diode steering element to set a storage element

A memory device in a 3-D read and write memory includes memory cells. Each memory cell includes a resistance-switching memory element (RSME) in series with a steering element. The RSME has first and second resistance-switching layers on either side of a conductive intermediate layer, and first and second electrodes at either end of the RSME. The first and second resistance-switching layers can both have a bipolar or unipolar switching characteristic. In a set or reset operation of the memory cell, an ionic current flows in the resistance-switching layers, contributing to a switching mechanism. An electron flow, which does not contribute to the switching mechanism, is reduced due to scattering by the conductive intermediate layer, to avoid damage to the steering element. Particular materials and combinations of materials for the different layers of the RSME are provided.

Composition of memory cell with resistance-switching layers

In a first aspect, a method of forming a metal-insulator-metal ('MIM') stack is provided, the method including: (1) forming a dielectric material having an opening and a first conductive carbon layer within the opening; (2) forming a spacer in the opening; (3) forming a carbon-based switching material on a sidewall of the spacer; and (4) forming a second conductive carbon layer above the carbon-based switching material. A ratio of a cross sectional area of the opening in the dielectric material to a cross sectional area of the carbon-based switching material on the sidewall of the spacer is at least 5. Numerous other aspects are provided.

Memory cell with carbon switching material having a reduced cross-sectional area and methods for forming the same

In a first aspect, a method of forming a memory cell is provided that includes (1) forming a metal-insulator-metal (MIM) stack, the MIM stack including (a) a first conductive carbon layer; (b) a low-hydrogen, silicon-containing carbon layer above the first conductive carbon layer; and (c) a second conductive carbon layer above the low-hydrogen, silicon-containing carbon layer; and (2) forming a steering element coupled to the MIM stack. Numerous other aspects are provided.

Memory cell with silicon-containing carbon switching layer and methods for forming the same

A method of making a device includes forming at least one anodizable metal layer over at least one of an electrode or a semiconductor device, forming a plurality of pores in the anodizable metal layer by anodization of the anodizable metal layer to expose a portion of the electrode or semiconductor device, and filling at least one pore with a rewritable material such that at least some of the rewritable material is in electrical contact with the electrode or semiconductor device.

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Santa Clara, CA, United States of America

Jingyan Zhang