Zenith Electronics Corporation

Micronas Semiconductors, Inc.

Trident Microsystems (Far East) Ltd.

Entropic Communications, Inc.

Jingsong Xia

Richard W Citta

Scott M LoPresto

Wenjun Zhang

Gopalan Krishnamurthy

Scott Matthew Lopresto

Xiaojun Yang

Hangbin Song

Mark J Fimoff

David A Willming

Jilian Zhu

Shidong Chen

David D Lin

An equalizer (A) comprises a feedforward filter (), wherein the feedforward filter includes a plurality of feedforward filter taps, coefficients are associated with the plurality of feedforward filter taps, and values of all of the coefficients associated with the plurality of feedforward filter taps are dynamically determined. In some embodiments, the equalizer also comprises a decision feedback equalizer ().

Apparatus for and method of developing equalized values from samples of a signal received from a channel

A digital receiver for processing a signal received from a channel includes a digital demodulator and an equalizer coupled to the digital demodulator. The equalizer includes a feedforward filter and a decision feedback equalizer (DFE), wherein the feedforward filter includes a plurality of feedforward filter taps. Coefficients are associated with the plurality of feedforward filter taps and the values of all of the coefficients associated with the plurality of feedforward filter taps are dynamically determined.

Advanced digital receiver

A method of controlling the operation of an equalizer (), wherein the equalizer is adapted to receive a transmitted signal () comprising at least one predetermined sequence of symbols, includes the step of developing a set of samples from a received signal. At least one plurality of samples is identified, wherein the at least one plurality of samples corresponds to the at least one predetermined sequence of symbols. The equalizer is then operated in a selected one of three modes. A first mode is selected if the at least one plurality of samples is identified, wherein the first mode includes the step of developing a signal-to-noise ratio (SNR) (). A second mode is selected if the at least one plurality of samples is identified and the SNR is greater than a first predetermined threshold. A third mode is selected if the at least one plurality of samples is identified and the SNR is greater than a second predetermined threshold.

Apparatus for and method of controlling the operation of an equalizer

A data-directed frequency-and-phase lock loop for an offset-QAM modulated signal comprises a first multiplier that multiplies the signal by the output of a VCO. The output of the first multiplier is phase-shifted by a second multiplier, then convolved by a third multiplier. The output of the third multiplier is split, with each portion being passed through a frequency-shift multiplier and a frequency-and-phase lock loop. The output of the two frequency-and-phase lock loops is summed and returned to the VCO to complete the feedback loop.

Data-directed frequency-and-phase lock loop

An adaptive equalizer comprises a trellis decoder; a mapper coupled to the output of the trellis decoder; and a decision feedback equalizer coupled to the output of the mapper. Each of the taps receives as input via the mapper output from a different one of the stages of the trellis decoder.

Combined trellis decoder and decision feedback equalizer

An equalizer for processing blocks of data includes n&#x2212;1 data shifters, n finite filters, an adder, and a controller. Each of the n&#x2212;1 data shifters shifts the blocks of data. One of the n finite filters applies a corresponding set of finite filter coefficients to the blocks of data, and each of the other n&#x2212;1 finite filters applies a set of finite filter coefficients to a corresponding output of the n&#x2212;1 data shifters. Ghosts of the blocks of data are not eliminated as a result of the application of the n sets of finite filter coefficients corresponding to the n finite filters, and n&#x3e;2. The adder is arranged to add outputs from the n finite filters. The controller is arranged to control the sets of finite filter coefficients corresponding to the n finite filters so that the addition performed by the adder substantially eliminates the ghosts.

Multipath ghost eliminating equalizer with optimum noise enhancement

A data-and-pilot directed frequency-and-phase lock loop for an offset-QAM modulated signal having a pilot signal comprising a pilot acquisition loop and a pair of data-directed acquisition loops. The pilot is extracted from the main signal by a pilot filter, then used both by the pilot acquisition loop and to remove the pilot from the signal to the data-directed acquisition loops. The outputs of the pilot and the two data-directed acquisition loops are summed and returned to the VCO to complete the feedback loop.

Data-directed frequency-and-phase lock loop for decoding an offset-QAM modulated signal having a pilot

An equalizer comprises: an FIR; a trellis decoder coupled to the FIR; a mapper coupled to the trellis decoder; and a decision feedback equalizer coupled to the mapper. The decision feedback equalizer receives the mapped and scaled output of the trellis decoder as input and an error signal is generated by subtracting an output of the decision feedback equalizer from the input to the trellis decoder.

Error generation for adaptive equalizer

A compound chirp is provided in a received signal to permit a receiver to synchronize to the received signal. The compound chirp has temporally overlapping up frequency and down frequency components.

Compound chirp and synchronizer for using same

An adaptive equalizer comprises a decision device; a decision feedback equalizer coupled to the decision device; an FIR filter coupled to the decision device; and a trellis decoder coupled to the decision device, adapted to provide a reliability output and a decoded output. An error signal is generated by subtracting an output of the decision feedback equalizer from an output of the decision device, the error signal being used to update coefficients of the taps of the FIR filter and the decision feedback equalizer. A magnitude of the change to the coefficients is selected based at least in part the reliability output of the trellis decoder.

Adaptive equalizer having a variable step size influenced by output from a trellis decoder

A digital equalizer comprises a matched filter that, in conjunction with an FIR filter, assures a single peak with substantially greater energy than other peaks caused by ghosts, thereby permitting synchronization even with multiple, arbitrarily strong ghosts caused by strong multipathing, multiple transmitters, or both.

Equalizer for time domain signal processing

A data-directed frequency-acquisition loop capable of generating a frequency error having a magnitude and direction from a double sideband suppressed signal comprises a first multiplier that multiplies the signal by the output of a VCO. The output of the first multiplier is convolved by a second multiplier. The I output of the second multiplier passes through a first low-pass filter. The filtered I output and the Q output are then multiplied by a third multiplier. The output of the third multiplier is filtered through a second low-pass filter, amplified, and return to the VCO to complete the feedback loop.

Data directed frequency acquisition loop that synchronizes to a received signal by using the redundancy of the data in the frequency domain

An equalizer substantially eliminates a ghost of a received main signal by (i) applying coefficients b (where b may be equal to one) to the received main signal and the ghost in order to modulate the received main signal and the ghost so that the received main signal and the ghost are unequal, (ii) applying coefficients a to the modulated received main signal and ghost in order to substantially eliminate the ghost, and (iii) applying coefficients c as a window function to the substantially ghost-free received main signal in order to remove the modulation imposed on the received main signal by the coefficients b.

Ghost eliminating equalizer

An equalizer includes n processing paths arranged to process blocks of data. N&#x2212;1 data shifters are arranged so that each of the n&#x2212;1 data shifters is in a corresponding one of the n processing paths and so that one of the n processing path has no data shifter. N finite filters are arranged so that each of the n finite filters is in a corresponding one of the n processing paths, and so that each of the n finite filters applies a corresponding set of finite filter coefficients to the blocks of data. Ghosts of the blocks of data are not eliminated as a result of the application of the sets of finite filter coefficients corresponding to the n finite filters, and n&#x3e;2. An adder is arranged to add outputs from the n processing paths such that the addition eliminates ghosts of the blocks of data.

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Mundelein, IL, United States of America

Jingsong Xia