Silicon Laboratories Inc.

Mediatek Corporation

Motorola Corporation

Psemi Corporation

Jing Li

Dan Bernard Kasha

Scott Willingham

Russell Croman

Michael Johnson

Aslamali A Rafi

Caiyi Wang

Michael James Mills

Ravikanth Venkata Suravarapu

Narayanan Baskaran

Saravanan Rajapandian

Michael R May

Emre Ayranci

Mustafa H Koroglu

Miles Sanner

Peter Vancorenland

Brian Douglas Green

Michael L Duffy

Zhiwei Dong

Riad S Wahby

Thomas Glen Ragan

Tuyen Van Nguyen

A multi-gain LNA with inductive source degeneration is presented. The inductive source degeneration is provided via a tunable degeneration network that includes an inductor in parallel with one or more switchable shunting networks. Each shunting network includes a shunting capacitor that can selectively be coupled in parallel to the inductor. A capacitance of the shunting capacitor is calculated so that a combined impedance of the inductor and the shunting capacitor at a narrowband frequency of operation is effectively an inductance. The inductance is calculated according to a desired gain of the LNA. According to one aspect, the switchable shunting network includes a resistor in series connection with the shunting capacitor to provide broadband frequency response stability of the tunable degeneration network. According to another aspect, the LNA includes a plurality of selectable branches to further control gain of the LNA.

Tunable effective inductance for multi-gain LNA with inductive source degeneration

A current buffer used in a receiver arrangement includes a direct path mode and a mirror path mode. The direct path mode includes a plurality of first set of transistors and a plurality of first set of current sources turned on while all remaining transistors and current sources are turned off, during the direct path mode a current signal at an input node directly appears at an output node. The mirror path mode includes a first transistor and a first current source being turned off while a plurality of second set of transistors and a plurality of second set of current sources are turned on. The current signal goes through a current mirror pair and appears at the output node with a gain which is controlled by slicing one of transistors of the current mirror pair and a second current source allowing multiple gains in the mirror path mode.

Low noise, programmable gain current buffer

A receiver includes LNA-mixer arrangement, a current buffer arrangement and an analog filter arrangement. The LNA-mixer arrangement receives a plurality of input signals and provides a wide-band input match for a specified frequency range of operation. The LNA-mixer arrangement includes a plurality of LNA structures and a plurality of mixer structures where each of the LNA structure path is coupled to a single mixer structure. The LNA-mixer arrangement outputs a first signal. The current buffer arrangement receives the first signal and reduces the Image Rejection (IR) asymmetry between the high frequency portion and the low frequency portion of the first signal as well as provides a gain to the first signal. The current buffer arrangement outputs a second signal. The analog filter arrangement receives the second signals and perform filtering and calibration.

Receiver arrangement and method of performing operations of receiver

A radio frequency (RF) signal is received in a receiver, and various counts based on information from the signal can be obtained. Counts of a number of samples of the RF signal exceeding first and second thresholds can be accumulated during an accumulation window. From the first of these counts, it can be determined if the count exceeds a first metric corresponding to a first predetermined count value, and if so, a gain of an RF gain element can be reduced. From the second of these counts it can be determined if this count exceeds a second metric corresponding to a second predetermined count value, and if not, the gain can be increased.

Statistical gain control in a receiver

A method includes receiving a desired channel indication in a radio tuner, determining a band of operation in which the channel is located, and if the channel is within a first band coupling multiple inductors into a resonant tank, and if the desired channel is within a second band coupling a single inductor into the resonant tank.

Providing multiple inductors for a radio tuner

An isolation receiver includes at least one isolation capacitor to provide a first logic signal in response to a second logic signal that is provided by a transmitter. The receiver includes a signal processing circuit to amplify the first logic signal to generate an amplified signal, and the signal processing circuit includes a an amplifier to apply a nonlinear function. A comparator of the receiver provides a third logic signal in response to the amplified signal.

Isolation receiver

In one embodiment, the present invention includes a method for configuring a single chip radio tuner having a configurable front end, which may be adapted within an integrated circuit (IC). The method may include setting a controller of the tuner with configuration information for a radio in which the tuner is located. Then, control signals responsive to the configuration information can be sent to the configurable front end to configure the tuner.

Integrating components in a radio tuner integrated circuit (IC) for a tracking filter

One aspect of the present invention is directed to a circuit that includes an amplifier circuit disposed between an isolation link and a Schmitt trigger circuit to amplify a differential signal communicated over the isolation link and supply the amplified signal to the Schmitt trigger circuit. In turn, the Schmitt trigger circuit is coupled to the amplifier circuit to receive the differential signal and to supply a differential output signal corresponding to the differential signal communicated over the isolation link.

Capacitive isolation receiver circuitry

A system including first voltage supply circuitry configured to provide a first voltage supply with spurious frequency content and second voltage supply circuitry configured to provide a second voltage supply without the spurious frequency content is provided. The system includes signal generation circuitry configured to generate a first digital signal using a clock signal and the first voltage supply and configured to cause the spurious frequency content on the first voltage supply and output circuitry configured to generate a second digital signal from the first digital signal synchronous with the clock signal using the second voltage supply.

Output circuitry for minimizing spurious frequency content

In one embodiment, the present invention includes a single chip radio tuner, which may be adapted within an integrated circuit (IC). The tuner may be provided with a configurable front end to receive and process a radio frequency (RF) signal via a signal path. This configurable front end may be differently controlled depending on a particular radio implementation in which the tuner is adapted.

Configurable radio front end

A method for model reduction (48) for electronic circuit simulation (52) of an electronic circuit using multipoint matrix Pade approximation is provided herein. Using the method, state equations are generated from a linear circuit to be analyzed. One or more expansion frequencies and a number of moments for each of the one or more expansion frequencies are provided. Starting block Lanczos vectors using a first expansion frequency of the one or more expansion frequencies and the state equations are generated. New block Lanczos vectors are generated from the starting block Lanczos vectors. The new block Lanczos vectors are scaled and normalized. Breakdowns in the new block Lanczos vectors are detected and treated to generate new starting block Lanczos vectors.

Growing community of inventors

Austin, TX, United States of America

Jing Li