Xilinx Technology Beijing Limited

Beijing Deephi Intelligent Technology Co., Ltd.

Jincheng Yu

Song Yao

The present invention relates to artificial neural network (ANN), for example, convolutional neural network (CNN). In particular, the present invention relates to how to implement and optimize a convolutional neural network based on an embedded FPGA. Specifically, it proposes a CPU+FPGA heterogeneous architecture to accelerate ANNs.

Combining CPU and special accelerator for implementing an artificial neural network

Systems, apparatus and methods are provided for accelerating a complex neural network by fixed-point data quantization. An Artificial Neural Network (ANN) has branches and comprises convolutional layers CONV, CONV, . . . CONV n, fully connected layers FC, FC, . . . , FC m, and concatenation layers CONCAT, CONCAT, . . . , CONCAT L. n, m and L are positive integers. The ANN may be optimized by a method comprising: converting output of each of the CONV, FC and CONCAT layers into fixed-point numbers, identifying at least one sub-network from the ANN and for each sub-network, modifying the fixed-point range of each output of the previous-level layers of the CONCAT layer on the basis of the fixed-point range of the CONCAT layer. The sub-network has a CONCAT layer as its output. The CONCAT layer receives at least two outputs of previous-level layers as inputs and concatenates the inputs into one output.

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Beijing, China

Jincheng Yu