Samsung Electronics Co., Ltd.

Samsung Sdi Co., Inc.

Skhynix Inc.

Jin-Wook Kim

Ki Hwan Kim

Dongsuk Shin

Junggun You

Gigwan Park

Ki-Hyun Yoon

Chi-young Ahn

Ju-Youn Kim

Ji-gwang Kim

Ju Youn Kim

Hong-Pyo Kim

Deok Han Bae

Myung Yoon Um

In Yeal Lee

Jae-Hyung Kim

Chae-Joo Son

Kyoung-hwan Yeo

Jae-yup Chung

Jae-Il Seong

Hideaki Yoshio

Jin-le Ryu

Jin-Ie Ryu

Ju Hun Park

Il-ryong Kim

Yong-gi Jeong

Ju-won Cho

Bo-Kyung Seong

Deokhan Bae

Jung-Hyun Park

Juhun Park

Yuri Lee

Chae-joo Son

Yoonyoung Jung

Se Ki Hong

Tae Eung Yoon

Soon-Ki Woo

Inyeal Lee

Jung Hoon Seo

Yoon Young Jung

Tae Won Ha

Seul Gi Yun

Ji-Wan Jeong

Gi-Ha Woo

Jea-Hun Hyun

Kyung-Keun Lee

Jai-Hwan Joo

A semiconductor device includes first and second active patterns protruding upward from a substrate, a gate electrode crossing the first and second active patterns and extending in a first direction, a first source/drain region on the first active pattern and on at least one side of the gate electrode, and a second source/drain region on the second active pattern and on at least one side of the gate electrode. The first and second source/drain regions have a conductivity type different from each other, and the second source/drain region has a bottom surface in contact with a top surface of the second active pattern and at a lower level than that of a bottom surface of the first source/drain region in contact with a top surface of the first active pattern. The first active pattern has a first width smaller than a second width of the second active pattern.

Semiconductor device and method of fabricating the same

Disclosed is a semiconductor device including a substrate including first and second active regions, a device isolation layer on the substrate and defining first and second active patterns, first and second gate electrodes running across the first and second active regions and aligned with each other, first and second source/drain patterns on the first and second active patterns, a first active contact connecting the first and second source/drain patterns to each other, and a gate cutting pattern between the first and second gate electrodes. An upper portion of the first active contact includes first and second upper dielectric patterns. The first active contact has a minimum width at a portion between the first and second upper dielectric patterns. A minimum width of the gate cutting pattern is a second width. A ratio of the first width to the second width is in a range of 0.8 to 1.2.

Semiconductor device

A semiconductor device is provided. The semiconductor device includes a substrate, an active pattern extending in a first direction on the substrate, a gate electrode extending in a second direction intersecting the first direction on the active pattern, a gate spacer extending in the second direction along side walls of the gate electrode, an interlayer insulating layer contacting side walls of the gate spacer, a trench formed on the gate electrode in the interlayer insulating layer, a first capping pattern provided along side walls of the trench, at least one side wall of the first capping pattern having an inclined profile, and a second capping pattern provided on the first capping pattern in the trench.

A semiconductor device includes a substrate, a gate structure on the substrate, and a gate contact in the gate structure. The gate structure includes a gate electrode extending in a first direction and a gate capping pattern on the gate electrode. The gate contact is connected to the gate electrode. The gate electrode includes a protrusion extending along a boundary between the gate contact and the gate capping pattern.

Semiconductor device and method for fabricating the same

A semiconductor device includes an active pattern extending in a first horizontal direction on a substrate, a gate electrode extending in a second horizontal direction across the active pattern, and including a first portion, and a second portion protruding upward from the first portion in a vertical direction, a capping pattern extending in the second horizontal direction on the gate electrode, and a gate contact disposed on the second portion of the gate electrode, overlapping the active pattern, and penetrating the capping pattern to connect the gate electrode.

Semiconductor device and method of fabricating same

A semiconductor device includes a substrate including first, second, third, and fourth regions, a first gate structure on the first region, a second gate structure on the second region, a third gate structure on the third region, and a fourth gate structure on the fourth region. The first gate structure includes a first gate insulating layer, a first material layer, and a first gate electrode layer. The second gate structure includes a second gate insulating layer, a second material layer, and a second gate electrode layer. The third gate structure includes a third gate insulating layer, a third material layer, and a third gate electrode layer. The fourth gate structure includes a fourth gate insulating layer and a fourth gate electrode layer. The first, second, and third material layers have different thicknesses. The first material layer includes a lower metal layer, an upper metal layer, and a polysilicon layer therebetween.

An integrated circuit device includes a substrate from which a plurality of fin-type active regions protrude, the plurality of fin-type active regions extending in parallel to one another in a first direction, and a plurality of gate structures and a plurality of fin-isolation insulating portions extending on the substrate in a second direction crossing the first direction and at a constant pitch in the first direction, wherein a pair of fin-isolation insulating portions from among the plurality of fin-isolation insulating portions are between a pair of gate structures from among the plurality of gate structures, and the plurality of fin-type active regions include a plurality of first fin-type regions and a plurality of second fin-type regions.

Integrated circuit device

An integrated circuit device includes a substrate having a first region and a second region, a first fin-isolation insulating portion in each of the first region and the second region and having a first width in a first direction, a pair of fin-type active regions spaced apart from each other in each of the first region and the second region with the first fin-isolation insulating portion therebetween, and extending in a straight line in the first direction, a pair of second fin-isolation insulating portions contacting, in each of the first region and the second region, two side walls of the first fin-isolation insulating portion, respectively, each of the two side walls facing the opposite sides in the first direction, and a plurality of gate structures extending in the second direction and comprising a plurality of dummy gate structures.

A voice recognition electronic device is provided which includes a housing including a first face that faces a first direction, a second face that faces a second direction opposite to the first direction, a third face disposed between the first face and the second face, and a translucent cover that forms at least a portion of the third face, a voice reception unit disposed below the first face of the housing and including a plurality of microphones that receive a voice input from a user, a light source unit disposed inside the housing to emit light, a driving unit connected to the light source unit to control the light source unit to move according to a preset operation, and a control unit that controls the driving unit in response to the voice input of the user, which is delivered from the voice reception unit.

Sound recognition electronic device

A semiconductor device includes a substrate having first and second active regions with a field insulating layer therebetween that contacts the first and second active regions, and a gate electrode on the substrate and traversing the first active region, the second active region, and the field insulating layer. The gate electrode includes a first portion over the first active region, a second portion over the second active region, and a third portion in contact with the first and second portions. The gate electrode includes an upper gate electrode having first through third thicknesses in the first through third portions, respectively, where the third thickness is greater than the first thickness, and smaller than the second thickness.

A rechargeable battery case that prevents a short circuit of a cell by inducing bending of a case under a lateral/longitudinal compression condition in a specific manner. The rechargeable battery case includes an opening in the case through which an electrode assembly is inserted. A bottom portion is provided at an end of the case opposite to that of the opening. A front portion is connected to the bottom portion. A back portion is connected to the bottom portion and the front portion. A joint portion is arranged between the front, back and bottom portion. Further, a first area and a second area are disposed longitudinally in the front and back portions. The second area is on either side of the first area. The joint portion in the second area is thicker than the joint portion in the first area.

Rechargeable battery

Television

Growing community of inventors

Hwaseong-si, South Korea

Jin-Wook Kim