Skhynix Inc.

Samsung Sdi Co., Inc.

Jin Wook Kim

Soon Ki Woo

Jong Ku Kim

Youn Han Chang

Youngjae Jin

Sang Bong Nam

Yin Jae Lee

Min Seok Choi

Young Taek Kim

Dong Ho Kang

Seon Ho Kim

Yang Uk Son

A memory device may include a memory medium and a memory controller. The memory medium may be configured to perform a self-refresh operation and an auto-refresh operation in response to a self-refresh signal and an auto-refresh control signal, respectively. The memory controller may be configured to control the auto-refresh operation by transmitting the auto-refresh control signal to the memory medium. The memory medium includes a self-refresh controller. The self-refresh controller may be configured to control the self-refresh operation based on a self-refresh cycle varying according to an internal temperature of the memory medium and transmit the self-refresh signal to the memory controller. The memory controller may be configured to generate the auto-refresh control signal based on an auto-refresh cycle. The auto-refresh control signal may be determined by the self-refresh signal transmitted from the memory medium.

Memory devices and methods of controlling an auto-refresh operation of the memory devices

A semiconductor device includes a latch circuit and a code comparison circuit. The latch circuit latches an output code generated based on an active command. The latch circuit outputs the latched output code as a latch code in response to a write command. The code comparison circuit compares the latch code with a write code to generate a detection signal.

Semiconductor devices and methods of handling data lifetime codes used therein

A memory device includes a memory medium and a memory controller. The memory medium has a memory cell array and may be configured to generate a self-refresh signal, which varies based on an internal temperature of the memory medium, to control a self-refresh operation performed on the memory cell array. The memory controller may be configured to calculate an auto refresh cycle of an auto refresh control signal for controlling an auto-refresh operation of the memory medium based on the self-refresh signal.

A semiconductor device includes a delay circuit and a column signal generation circuit. The delay circuit delays a write signal by a sum of a write latency time and a burst operation time to generate a write pulse, delays a read signal to generate a read pulse, and generates a pre-charge signal which is enabled after a predetermined period elapses from a time when the write signal is generated. The column signal generation circuit generates a column signal from a chip selection signal and a command/address signal when the write pulse or the read pulse is inputted to the column signal generation circuit. The column signal is a signal for selecting at least one memory cell included in one of a plurality of banks.

Semiconductor devices and semiconductor systems including the semiconductor devices

A refresh control device may include, an address processing circuit configured to divide an input address into a plurality of partial addresses, and generate an updated partial address input count based on an input count for each partial address value. The refresh control device also includes a target refresh address generation circuit configured to generate a target refresh address based on the updated partial address input count, and a target refresh circuit configured to perform a refresh operation on a word line corresponding to the target refresh address.

Refresh control device

Disclosed is a cylindrical lithium secondary battery capable of improving the stability thereof against the external pressure, The cylindrical lithium secondary battery includes an electrode assembly and a core. The electrode assembly includes a first electrode sheet, a second electrode sheet and a separator interposed between the first and second electrode sheets, which are rolled together about an axis. The electrode assembly defines a space. The core has a tubular shape provided with a gap. The core includes at least one reinforcing structure extending in a direction extending along the axis. The core is inserted into the space of the electrode assembly. A housing receives the electrode assembly and core.

Secondary battery

A cylindrical lithium secondary battery includes an electrode assembly which has a first electrode plate, a second electrode plate, and a separator provided between the first electrode plate and the second electrode plate, is wound in a spiral shape, and has a central space at the center of winding; a core member which is inserted into the central space of the electrode assembly; a case having a space for containing the electrode assembly; and a cap assembly which is connected to an upper portion of the case so as to seal the case. The core member is formed in a tube shape having a gap along a longitudinal direction, which divides the core member into a body portion and left and right lateral end portions, wherein an imaginary arc line extending from an outer circumferential surface of the body portion of the core member defines an imaginary circumference, and wherein the left and right lateral end portions are located inside the imaginary circumference and comprise a pair of first bending portions, inwardly bending and symmetrically disposed with respect to the gap, and a pair of second bending portions bending in a rotation direction that is opposite to the inwardly bending rotational directions of the first bending portions.

Growing community of inventors

Yongin-si, South Korea

Jin Wook Kim