Samsung Electronics Co., Ltd.

Jin-Woo Bae

Inho Kim

Jonghyuk Park

Byoungho Kwon

Inseak Hwang

Yanghee Lee

Hyesung Park

Ki-Vin Im

Jun-Seok Lee

In-seak Hwang

Byoung-ho Kwon

Hye-sung Park

Jong-hyuk Park

Hee-sook Cheon

Provided are a semiconductor device and a method of fabricating the same. The semiconductor device may include a semiconductor substrate including a first region and a second region, a dummy separation pattern provided on the second region of the semiconductor substrate to have a recessed region at its upper portion, a first electrode provided on the first region of the semiconductor substrate, a dielectric layer covering the first electrode, a second electrode provided on the dielectric layer, and a remaining electrode pattern provided in the recessed region. The second electrode and the remaining electrode pattern may be formed of a same material.

Semiconductor device and method of fabricating the same

A method of fabricating a semiconductor device includes providing a substrate including a pair of first regions and a second region therebetween, forming first patterns on the respective first regions to at least partially define a stepwise portion at the second region, and forming a dummy pattern that at least partially fills the stepwise portion. The dummy pattern may be an electrically floating structure. The dummy pattern may be formed as part of forming second patterns on the respective first regions, and the dummy pattern and the second patterns may include substantially common materials. Because the dummy pattern at least partially fills the stepwise portion at the second region, the material layer covering the second patterns and the dummy pattern may omit a corresponding stepwise portion.

Method of fabricating semiconductor device

A method of fabricating a semiconductor device includes providing a substrate having a cell region and a peripheral circuit region. A plurality of bit line structures are formed on the substrate in the cell region, and a gate structure having the same structure as each of the bit line structures is formed on the substrate in the peripheral circuit region. A spacer is formed on sidewalls of the bit line structures and the gate structure. The bit line structures extend in a first direction and are spaced apart from each other in a second direction that is perpendicular to the first direction by first grooves that extend in the first direction. A sacrificial layer is formed to fill the first grooves and to cover top surfaces of the bit line structures and the gate structure. The sacrificial layer is planarized until the top surfaces of the bit line structures and the gate structure are exposed.

Methods of fabricating semiconductor devices

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Yongin-si, South Korea

Jin-Woo Bae