Lg Display Co., Ltd.

Jin-Su Kim

Sung-Jin Um

Jin-Hyung Jung

A method of fabricating an array substrate, forming a gate line in a display region and a first auxiliary pattern in a non-display region forming a gate insulating layer on the gate line and the first auxiliary pattern forming a data line in the display region and a second auxiliary pattern in the non-display region over the gate insulating layer, wherein the data line crosses the gate line to define a pixel region forming a passivation layer on the data line and the second auxiliary pattern, and the passivation layer including first and second contact holes respectively exposing the first and second auxiliary patterns forming a planarization layer and a bridge pattern on the passivation layer forming a pixel electrode on the planarization layer and in the pixel region, and a connection pattern on the bridge pattern, wherein the connection pattern contacts the first and second auxiliary patterns.

Array substrate and method of fabricating the same

An array substrate according to an embodiment includes a gate line and a data line in a display region and crossing each other to define a pixel region; first and second auxiliary patterns in a non-display region; a gate insulating layer between the gate and data lines and the first and second auxiliary patterns; a passivation layer on the data line and the second auxiliary pattern and including first and second contact holes respectively exposing the first and second auxiliary patterns; a planarization layer on the passivation layer and including first and second pack holes, which respectively correspond to the first and second contact holes; a bridge pattern between the first and second pack holes and overlapping the second auxiliary pattern; a pixel electrode on the planarization layer and in the pixel region; and a connection pattern on the bridge pattern and contacting the first and second auxiliary patterns.

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Incheon, South Korea

Jin-Su Kim