Apple Inc.

Jin-Soo Yoo

Xiaoning Nie

Mathias Kohlenz

A merge sort circuit can include a parallel merge sort core that performs a partial merge on two input tuples, each containing a number P of data elements sorted according to a sort key, to produce a sorted output tuple of P data elements. Input data blocks to be merged can be stored in first and second block buffers. The block buffers can receive data from a vector memory read interface that reads groups of at least P data elements at a time. Loading of data elements into the block buffers can be based on respective fill levels of the block buffers.

Growing community of inventors

Sunnyvale, CA, United States of America

Jin-Soo Yoo