International Business Machines Corporation

Jin Song Ji

Xiao Feng Guan

Michael K Gschwind

William Jon Schmidt

Jian Min Jiang

Si Yuan Zhang

Qing Feng Zhang

Ronald Ian McIntosh

Ke Wen Lin

JiuFu Guo

Jia Bing Liu

Steven Jay Munroe

Zhao Wu

Charles Franklin Webb

Hong Iris Zhu

Yuheng Zhang

John Stephen Liptay

Barry Watson Krumm

Zhi Peng Liu

Steven T Comfort

Yi Zeng Mao

Steven QiHong Ying

David Man Wong

Yan Liu

Embodiments of the present invention may track a user's interaction trajectory associated with a problem occurred on a website. According to an embodiment of the present invention, a first symbol of a first definition associated with a first object file is obtained. Then, in response to the first symbol matching a second symbol of a second definition associated with a second object file, the first object file is optimized based on a first segment associated with the first definition in the first object file and an optimization to the second object file is skipped. Next, an executable file is generated based on the optimized first object file and the second object file.

Generating executable files through compiler optimization

A compiler includes a vector instruction processing mechanism that generates instructions for vector instructions in a way that assures correct operation in a bi-endian environment, wherein the processor architecture contains instructions with an inherent endian bias, along with at least one memory access instruction with a contrary endian bias. The compiler uses a code generation endian preference that matches the inherent computer system endian bias. The compiler generates instructions for vector instructions by determining whether the vector instruction has an endian bias that matches the code generation endian preference. When the endian bias of the vector instruction matches the code generation endian preference, the compiler generates one or more instructions for the vector instruction as normal. When the endian bias of the vector instruction does not match the code generation endian preference, the compiler generates instructions that include one or more vector element reverse instructions to fix the mismatch.

Compiler method for generating instructions for vector operations in a multi-endian instruction set

There is provided a method for processing a source file to generate an object file, comprising: obtaining a header file referenced by the source file; in response to the source file calling a data symbol defined in the header file, creating an indicator of a definition the data symbol, wherein definitions of different data symbols correspond to different indicators; and adding the indicator into a compiling result of compiling the source file so as to generate the object file. With the present invention, a dependency between the source file and the header file can be recorded, and the number of source files needed to be re-compiled can be reduced on the basis of the dependency.

Processing source file

A template function is received. The template function includes one or more data types. A single abstract instantiation of the template function is created. An abstract internal descriptor for each data type is created. A map set for each abstract internal descriptor is created. The number of instantiations required and the type of instantiation required is provided. A finished object is created using each map set. The finished object is a translation of the intermediate representation into assembly code.

Optimized compiling of a template function

Optimizing a parallel build of an application includes, in parallel execution of commands, recording command sequence numbers and access information of the commands and detecting an execution conflict based on the command sequence numbers and the access information of the commands using a processor. Commands involved in the execution conflict are re-executed serially.

Optimizing parallel build of application

The present disclosure relates to a stack overflow protection device and a stack protection method. According to the present disclosure, a stack overflow protection device is provided, which includes a dividing unit configured to divide at least one function in the input codes into a code region with a string operation and a code region without a string operation. The device also includes a stack protection unit configured to set up stack protection in the code region with a string operation. The present disclosure further provides a stack protection method.

Stack overflow protection device, method, and related compiler and computing device

An optimizing compiler includes a vector optimization mechanism that optimizes vector instructions by eliminating one or more vector element reverse operations. The compiler can generate code that includes multiple vector element reverse operations that are inserted by the compiler to account for a mismatch between the endian bias of the instruction and the endian preference indicated by the programmer or programming environment. The compiler then analyzes the code and reduces the number of vector element reverse operations to improve the run-time performance of the code.

Compiler optimizations for vector instructions

A compiler includes a vector instruction processing mechanism that generates instructions for vector instructions in a way that assures correct operation in a bi-endian environment, wherein the processor architecture contains instructions with an inherent endian bias. The compiler uses a code generation endian preference that is specified by the user, and that determines a natural element order. When the compiler processes a computer program, it generates instructions for vector operations by determining whether the vector instruction has an endian bias that matches the specified endian preference. When the vector instruction has no endian bias, or when the endian bias of the vector instruction matches the specified endian preference, the compiler generates one or more instructions for the vector instruction as it normally does. When the endian bias of the vector instruction does not match the specified endian preference, the compiler generates instructions to fix the mismatch.

Compiler method for generating instructions for vector operations on a multi-endian processor

The present disclosure relates to a method and system for identifying a semantic difference between source code versions. In one embodiment of the present disclosure, there is provided a method for identifying a semantic difference between source code versions, comprising: obtaining first debugging information of a first source code version and second debugging information of a second source code version respectively; determining, by comparing the first debugging information with the second debugging information, whether in the second source code version there exists a second function matching a first function in the first source code version; and identifying the semantic difference on the basis of a result of the determining. In one embodiment of the present disclosure, there is provided a system for identifying a semantic difference between source code versions. By means of the present disclosure, a semantic difference between various source code versions can be identified rapidly and accurately.

Identifying semantic differences between source code versions

A compiler includes a vector instruction processing mechanism that generates instructions for vector instructions in a way that assures correct operation in a bi-endian environment, wherein the processor architecture contains instructions with an inherent endian bias. The compiler uses a code generation endian preference that is specified by the user, and that determines a natural element order. When the compiler processes a computer program, it generates instructions for vector operations by determining whether the vector instruction has an endian bias that matches the specified endian preference (i.e., the inherent element order of the vector instruction matches the natural element order). When the vector instruction has no endian bias, or when the endian bias of the vector instruction matches the specified endian preference, the compiler generates one or more instructions for the vector instruction as it normally does. When the endian bias of the vector instruction does not match the specified endian preference, the compiler generates instructions to fix the mismatch.

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Ponte Vedra, FL, United States of America

Jin Song Ji