Seagate Technology Incorporated

Jin Quan Shen

Xiong Liu

Yong Peng Chng

Thein Than Zaw

Robertus Hartono

Choon Kiat Tan

Wei Zhang

Brian Thomas Edgar

Qiang Bi

Abhay Tejmal Kataria

Choon Wei Ng

Feng Shen

Xiang Lu

Jae Ik Song

Hui Liu

Tse Jen Lee

ChoonWei Ng

David W Miller

Hui Wang

Caihua Zheng

An alternate reality, such as virtual reality or augmented reality, environment can experience optimized performance with a data system arranged with an interaction device connected to a virtual reality assembly. Base content and user content can respectively be downloaded and stored to a local data storage of the virtual reality assembly. The content may be utilized to proactively generate comprehensive content that consists of merged aspects of the base content and the user content. The comprehensive content can then be executed to create an immersive digital reality conveyed to a user via the interaction device.

Prospective generation and storage of content for an alternate reality environment

A data storage system includes a plurality of data storage drives, and a system controller coupled to each data storage drive of the plurality of data storage drives. The system controller is configured to store internal drive management data for each data storage drive of the plurality of data storage drives.

External storage of internal drive management data

A device includes a servo controller that includes or that is coupled to memory. The memory stores multiple distinct disturbance control schemes. The servo controller is configured to select and implement one of the disturbance control schemes in response to receiving a command from a host. The servo controller can be implemented on a system on a chip.

Adaptable servo controllers

The technology disclosed herein pertains to a system and method for storing data on a storage media using both down-track super parity and cross-track super parity. Specifically, a method disclosed herein provides for generating down-track super parity values for data on the plurality of tracks and storing the down-track super parity values on a down-track super parity row of the storage block and generating cross-track super parity values for data on the plurality of rows and storing the cross-track super parity values on a cross-track upper parity track, wherein the cross-track super parity value for any given row is generated by inputting the data on the given row into an exclusive-OR (XOR) gate.

Matrix super parity for data storage

A disk drive comprises non-volatile rotatable media and a controller operatively coupled to the non-volatile rotatable media. The controller is configured to receive a series of host commands to be executed by the controller and generate a command execution sequence comprising the series of host commands. A task manager, integral or coupled to the controller, is configured to receive a plurality of background tasks comprising a least two priority background tasks to be executed by the controller along with execution of the series of host commands, and insert one or more of the at least two priority background tasks into the command execution sequence while maintaining a specified ratio of priority background task execution and host command execution substantially constant. The controller is configured to execute the command execution sequence with the one or more inserted priority background tasks.

Disk drive controller incorporating task manager for reducing performance spikes

A data storage system can connect a cache memory to a caching module, a host, and a data storage device. The caching module can employ one or more local controllers to generate a caching strategy in response to detected data storage operations and execute the caching strategy to divide the cache memory into a first pool having a first size and a second pool having a second size.

Data storage system with adaptive cache management

A hard disk assembly (HDAs) that include a tuning data memory at least including tuning data regarding the HDA. The HDAs may lack an internal disk controller, but rather may communicate the tuning data and/or other HDA-specific data (e.g., firmware, certification data, etc.) to a reader device comprising a disk controller. In this regard, the reader device may coordinate with the HDA once the tuning data is received to operate the HDA to perform TO commands in response to commands received at the reader device from a host. In turn, upon failure of an HDA, a new HDA may be swapped into place to communicate with the reader device. Because the HDAs may lack onboard disk controllers, the cost and complexity of each HDA may be reduced.

Hard drive assembly with onboard tuned data memory

A data storage device that includes a data storage medium and a controller communicatively coupled to the data storage medium. The controller is configured to receive commands from a host and to detect a hung state in the data storage device. The controller is also configured to determine an execution status of a command, of the commands from the host, associated with the hung state. The controller is further configured to dynamically carry out a self-recovery operation in the data storage device to clear the hung state. The self-recovery operation includes steps that depend upon the execution status of the command associated with the hung state.

Storage device self-recovery exception engine

Systems and methods for saving critical data upon power loss are described. In one embodiment, the systems and methods include performing a write operation to a first track of a storage drive, monitoring a voltage level of a storage drive to detect power loss on the storage drive while performing the write operation, identifying a track ID of a second track adjacent to the first track upon detecting power loss on the storage drive, and storing the identified track ID in a non-volatile memory on the storage drive.

Save critical data upon power loss

An implementation of a system disclosed herein provides an apparatus, comprising a system on chip, wherein the system on chip is configured to receive a sleep command from a host and in response to the sleep command, calculate a primary checksum of a block of data from a low latency memory such as a tightly coupled memory (TCM), copy the primary checksum and the block of data into a volatile storage media, preserve interface variables of the system on chip in the volatile storage media, operate the volatile storage media in a self-refresh mode, and shut down power to other components on the system on chip.

System on chip power management

A method or system comprises reading content of a plurality of system files from storage media of a storage device, generating a master storage device system file, and storing the master storage device system file on the storage media at a master system file location. The location of the master system file is provided to boot firmware or hardware. As a result, when the system boots up, the master system file is read into a temporary cache.

Growing community of inventors

Singapore, Singapore

Jin Quan Shen