Intel Corporation

Primarion Corporation

Jin Pan

Jin Yang

Todd P Albertson

Abram M Detofsky

Erkan Acar

John Michael Peterson

Jun Ding

Robert L Sankman

Dmitri E Nikonov

Pooya Tadayon

James G Maveety

David Shia

Ashish Gupta

Raseong Kim

Ronald K Minemier

Arun Krishnamoorthy

Hua Zhu

Joseph F Walczyk

Daniel J Dangelo

Stephen Sturges

Evan M Fledell

Brett D Grossman

Dinia P Kitendaugh

Mustapha Amadu Abdulai

Hon Lee Kon

Tim Swettlen

A testing system and process comprises a converged test platform for structural testing and system testing of an integrated circuit device. The testing system comprises a converged test platform supported by a baseboard of an automated test assembly. The converged test platform comprises a DUT socket for testing an integrated circuit device, at least one testing electronic component selectively electrically coupled to the DUT socket by at least one switch operable to electrically switch at least some testing signals between the automated testing assembly and the DUT socket to the at least one testing electronic component for both structural testing and system testing of the integrated circuit device within the same test flow. The switch(es) and testing electronic component(s) (e.g., an FPGA) can be reprogrammable for testing flexibility and faster through put. Associated processes and methods are provided for both class and system testing using the converged test platform for back-end and front-end testing.

Converged test platforms and processes for class and system testing of integrated circuits

A test apparatus and method of testing a DUT are described. The apparatus includes a receiver and transmitter path each having a pair of switches that switch between a bypass position and a direct position. The bypass position is used for low frequency signals communicated through the apparatus. The direct position allows higher frequency signals to be double converted by upconversion to an IF signal and bandpass filtered before being downconverted to a predetermined frequency. Both variable and fixed LO signals are used to convert the double converted signals so that the same IF may be used independent of the higher frequency signal received or transmitted. Bandpass filtering is applied before and after amplification of the IF signal. Lowpass filtering before and after the double conversion use LPFs of different cutoff frequencies.

High density low cost wideband production RF test instrument architecture

A microelectronic test device comprising an organic substrate, a probe holder, and an interposer disposed between the organic substrate and the probe holder, wherein the interposer has a coefficient of thermal expansion that is less than a coefficient of thermal expansion of the organic substrate. The interposer may effectively decouple the organic substrate from probes in the probe holder, which may substantially reduce or eliminate probe misalignment due to the coefficient of thermal expansion mismatch between the organic substrate and other components of the microelectronic test device and to provide require stiffness to the organic substrate.

Microelectronic test device including a probe card having an interposer

In accordance with one aspect of the present description, an interface between an integrated circuit device and a test controller for testing the integrated circuit device includes a plurality of boards coupled together. In one embodiment, the test interface includes a plurality of interchangeable auxiliary boards, each having test circuitry, which may be coupled to a primary board and reused as appropriate to test various integrated circuits. Other aspects are described.

Integrated circuit testing architecture

Three dimensional integrated circuits including semiconductive organic materials are described. In some embodiments, the three dimensional integrated circuits include one or more electronic components that include a semiconductive region formed of one or more semiconductive organic materials. The electronic components of the three dimensional integrated circuits may also include insulating regions formed from organic insulating materials, and conductive regions form from conductive materials. The three dimensional integrated circuits may be formed by an additive manufacturing process such as three dimensional printing. Apparatus and methods for producing and testing three dimensional integrated circuits are also described.

Integrated circuits and systems and methods for producing the same

A thermal interface unit includes a pedestal, a first contact surface below the pedestal to interface with a first die and a flat spring to enable the first contact surface to adapt to a variable height of a first die of a multi-chip package (MCP).

Thermal interface for multi-chip packages

The present application relates to apparatus and methods for burn-in and other diagnostics performed on integrated circuits. In one embodiment, the invention includes a plurality of sockets, each to hold an integrated circuit (IC), and coupling power to the respective IC from a remote power supply, a plurality of voltage detectors, each coupled to a socket to sense the voltage of the power coupled to the respective IC, and a plurality of remote voltage regulators, each coupled between the power supply and a respective socket, to receive the sensed voltage from the respective voltage detector and to adjust the voltage of the respective coupled power in accordance therewith.

Temperature and voltage controlled integrated circuit processes

A method and apparatus for making a probe head that has reduced voltage droop and improved transient response. One embodiment a cable providing a plurality of signal conductors and a plurality of power conductors including a first power conductor and a second power conductor, a probe head wired to the cable, a plurality of electrical contacts including a first electrical contact and a second electrical contact, wherein each one of the plurality of electrical contacts is fixed to the probe head and wherein the first power conductor is connected to the first electrical contact, and a first regulatory device physically residing in the probe head and wired between the second power conductor and the first electrical contact. In some embodiments, the first regulatory device includes an active transient control device that senses an output voltage and sources or sinks an appropriate supplemental amount of current to improve transient response.

Embedded voltage regulator and active transient control device in probe head for improved power delivery and method

A probe burn resistant interface apparatus and method for testing an electronic device use a probe made of a shape memory alloy which upon overheating of the probe during functionality testing of an electronic device contracts the probe to disengage the probe from a contact electrically connected to the electronic device and stop current flow through the probe. Upon cooling of the probe, engagement of the probe with the contact is reestablished. The probe in an example embodiment is a wire which has a core made of a shape memory alloy and a layer of a highly elastic metal, for example copper, on an outer surface of the core to aid return of the probe from its contracted state to its initial state upon cooling an overheated probe for reestablishing electrical connection of the probe with the electronic device being tested.

Method and apparatus for resisting probe burn using shape memory alloy probe during testing of an electronic device

Growing community of inventors

Portland, OR, United States of America

Jin Pan