Samsung Electronics Co., Ltd.

Jin-Ook Song

Jae-Gon Lee

Ho-Yeon Jeon

Youn-Sik Choi

Byung-Tak Lee

Yun-Ju Kwon

Dong-Sik Cho

Min-joung Lee

Dong-sik Cho

Yun-ju Kwon

A system on chip (SoC) adjusts power of a memory through a handshake. The SoC includes a memory controller and a power manager. The memory controller is configured to control a memory. The power manager is configured to manage a supply power level of the memory. The memory controller is configured to output, to the power manager, a memory access level indicating a frequency of accesses to the memory. The power manager is configured to adjust the supply power level of the memory according to the memory access level.

System on chip controlling memory power using handshake process and operating method thereof

In one embodiment, the clock management circuitry includes a first master clock controller configured to provide a first command to a first slave clock controller via a first channel based on a received first clock request. The clock management circuitry also includes the first slave clock controller configured to control outputting a first clock signal based on the first command.

System on chip including clock management unit and method of operating the system on chip

A device includes a first divider circuit connected to a first data lane and configured to receive a first data lane value having a first index, to receive a second index corresponding to a second data lane value from a second data lane, and to selectively output a first adding value or the first data lane value based on whether the first index is equal to the second index and a first adder circuit connected to the second data lane and the first divider circuit and configured to receive the first adding value from the first divider circuit, to receive the second data lane value, and to add the first adding value to the second data lane value to generate an addition result.

Calculation device for and calculation method of performing convolution

A system-on-chip (SoC) comprises a clock management unit (CMU) including a first clock generator and a second clock generator, the first and second clock generators being configured to generate clock signals. The SoC comprises at least one logic block configured to request the clock signals from the CMU according to a full handshake method and receive the clock signals from the CMU in response to the request. The first clock generator and the second clock generator are configured to communicate according to the full handshake method.

System-on-chip to support full handshake and mobile device having the same

A power management system controlling power for a plurality of functional blocks included in a system-on-chip includes a plurality of programmable nano controllers, an instruction memory and a signal map memory. The instruction memory is shared by the nano controllers and stores a plurality of instructions that are used by the nano controllers. The signal map memory is shared by the nano controllers and stores a plurality of signals that are provided to the functional blocks and are controlled by the nano controllers. A first nano controller among the plurality of nano controllers is programmed as a central sequencer. Second through n-th nano controllers among the plurality of nano controllers are programmed as first sub-sequencers that are dependent on the first nano controller.

Power management system, system-on-chip including the same and mobile device including the same

A clock dividing device includes an accumulator that accumulates a first accumulated value and a denominator value and stores a second accumulated value, a register that stores a delayed accumulated value obtained by delaying the second accumulated value, a first comparison operation unit that performs a comparative operation on the second accumulated value and a numerator value and stores the second accumulated value as a greater value if the second accumulated value is greater than or equal to the numerator value, a second comparison operation unit that performs a comparative operation on the delayed accumulated value and the numerator value and stores the delayed accumulated value as a delay greater value if the delayed accumulated value is greater than or equal to the numerator value, and a third comparison operation unit that performs a comparative operation on the greater value and the delay greater value and determines the shape of a clock, wherein the shape of the clock is one of a bypass, a rising edge, and a falling edge.

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Seoul, South Korea

Jin-Ook Song