Intel Corporation

Oracle America, Inc.

Other

Jin Lin

Xinmin Tian

John Ng

Yuguang Wu

Robert Geva

Rakesh Krishnaiyer

Hideki Ido

Robert J Cox

Nishkam Ravi

Renat V Valiullin

Ernesto Su

Methods to improve optimization of compilation are presented. In one embodiment, a method includes identifying one or more optimization speculations with respect to a code region and speculatively performing transformation on an intermediate representation of the code region in accordance with an optimization speculation. The method includes generating an advice message corresponding to the optimization speculation and displaying the advice message if the optimization speculation results in an improved compilation result.

Speculative compilation to generate advice messages

Methods and apparatus to provide loop parallelization based on loop splitting and/or index array are described. In one embodiment, one or more split loops, corresponding to an original loop, are generated based on the mis-speculation information. In another embodiment, a plurality of subloops are generated from an original loop based on an index array. Other embodiments are also described.

Loop parallelization based on loop splitting or index array

A system and method are configured to apply region level optimizations to a selected region of source code rather than loop level optimizations to a loop or loop nest. The region may include an outer loop, a plurality of inner loops and at least one control code. If the region includes an exceptional control flow statement and/or a procedure call, speculative region-level multi-versioning may be applied.

Speculative region-level loop optimizations

A system and method for aggressive loop parallelization using speculative execution is disclosed. The method may include transforming code of a target application for concurrent execution, which may include adding an instruction to create a global address table entry for each store operation on which a load operation of a different loop iteration is dependent. The method may include replacing a standard load instruction with a special instruction configured to determine if an operand address of the load matches an operand address in one of the global address table entries. Another special instruction may remove a table entry following execution of the corresponding store operation. If an operand address of a load of a currently executing thread matches an operand address in the global address table, the method may include setting a checkpoint, completing execution of the thread in a pre-fetch mode, and re-executing the thread from the checkpoint.

Aggressive loop parallelization using speculative execution mechanisms

A method for transforming access to a structure array, that includes compiling source code, wherein compiling the source code includes identifying the structure array in the source code, performing an object safety analysis to determine whether the structure array is safe for transformation, wherein the object safety analysis includes an inter-procedural alias class analysis, performing a profitability analysis on the structure array when the structure array is safe for transformation, wherein the profitability analysis includes selecting a transformation from a plurality of transformations, wherein the plurality of transformations includes a pointer based fully splitting transformation, a pointer based partially splitting transformation, and an address based fully splitting transformation, and performing the selected transformation on the structure array, and storing the compiled code.

Growing community of inventors

San Jose, CA, United States of America

Jin Lin