Samsung Electronics Co., Ltd.

Hyundai Electronics Industries Co. Ltd.

Jin-Kook Kim

Jin-Yub Lee

Seong-Kue Jo

Jong-Hoon Lee

Jae-Phil Boo

Yong-Taek Jeong

Sang-Seon Lee

Jong-Bok Kim

Myoung-Sik Chang

Mi-Ran Kim

Methods of programming a non-volatile memory device having at least one memory block with a plurality of memory cells located at intersections of rows and columns is disclosed. Pursuant to these methods, at least two addresses that select corresponding rows of the memory block may be received and temporarily stored. Then, the rows selected by the temporarily stored addresses may be simultaneously activated, and at least some of the memory cells in the activated rows are simultaneously programmed. Corresponding non-volatile memory devices are also provided.

Non-volatile memory devices having multi-page programming capabilities and related methods of operating such devices

In one aspect, a word line enable method in a flash memory device includes driving a signal line corresponding to a selected word line with a word line voltage, and stepwise increasing a gate voltage of a switch transistor connected between the selected word line and the signal line during a program execute period.

Flash memory device and word line enable method thereof

Embodiments of the invention provide a high voltage transfer circuit, a row decoder circuit comprising the high voltage transfer circuit, and a non-volatile semiconductor memory device comprising the high voltage transfer circuit. In one embodiment, the invention provides a high voltage transfer circuit of a semiconductor memory device comprising a high voltage switch comprising a high voltage transistor comprising a first terminal connected to a boosted voltage via a first depletion-type transistor and comprising a second terminal connected to an output node via a second depletion-type transistor. The high voltage transfer circuit further comprises a driver circuit adapted to drive the first and second depletion-type transistors and the high voltage transistor in response to an input signal.

High voltage transfer circuit and row decoder circuit comprising a high voltage transfer circuit

A method of programming a flash memory device includes charging selection lines with a first voltage while applying program data to bit lines to during a bit line setup interval, then activating a block word line to electrically connect the selection lines to corresponding word lines, and then applying a second voltage, greater than the first voltage, to a selected one of the selection lines. Related devices are also disclosed.

Methods/circuits for programming flash memory devices using overlapping bit line setup and word line enable intervals

Provided is a polishing pad for a chemical mechanical polishing (CMP) apparatus, having a sealing barrier which prevents fluid leakage and moisture accumulation on a window. The polishing pad comprises an upper pad having polishing surface in contact with a wafer, a bottom pad an upper face of which is attached to a lower face of the upper pad and a lower face of which is attached to an upper face of a platen of the CMP apparatus, an aperture through the bottom pad and the upper pad, a transparent window fitted in the aperture in the upper pad, and a sealing barrier, placed between the aperture and an external face of the bottom pad in contact with a fluid, to prevent fluid leakage and accumulation of moisture derived from fluid fed on the polishing surface through the bottom pad.

Polishing pad for chemical mechanical polishing apparatus

An anti-fuse for programming a redundancy cell and a repair circuit having a programming apparatus are disclosed. The circuit includes a half power voltage supplier for supplying a half power voltage, a programming voltage supplier for supplying a programming voltage for exchanging a defective cell of the memory cell array with a redundancy cell, a ground voltage supplier for supplying a ground electric potential in response to an address signal of the memory cell, an anti-fuse for receiving a voltage of the half power voltage supplier and charging the same in the normal operation and breaking a dielectric film in accordance with a voltage difference between the programming voltage supplier and the ground voltage supplier during the programming operation for thereby implementing a programming, and an output unit for outputting an output signal based on the programmed state of the anti-fuse in accordance with a voltage applied from a node commonly connected with the half power voltage supplier, the programming voltage supplier, and the anti-fuse, for thereby enhancing a fabrication yield and reliability of a memory apparatus by easily exchanging a defective cell with a redundancy cell using a threshold voltage of a dielectric film without using an expensive laser apparatus.

Growing community of inventors

Seoul, South Korea

Jin-Kook Kim