Semiconductor Manufacturing International (Shanghai) Corporation

Jin Kang

Yong Chen

Xinpeng Wang

Weihai Bu

Mingching Wang

Various embodiments provide transistors and methods for forming the same. In an exemplary method, a substrate is provided, having a dummy gate structure including a dummy gate dielectric layer on the substrate and a dummy gate layer on the dummy gate dielectric layer. A dielectric layer is formed on the substrate and on sidewall surfaces of the dummy gate structure. A top surface of the dielectric layer is leveled with a top surface of the dummy gate structure. A barrier layer is formed on the dielectric layer for protecting the dielectric layer. The dummy gate layer and the dummy gate dielectric layer are removed, to form an opening in the dielectric layer without reducing a thickness of the dielectric layer. A gate dielectric layer is formed on sidewall surfaces and a bottom surface of the opening. A gate layer is formed on the gate dielectric layer to fill the opening.

Transistor and method for forming the same

A method for processing integrated circuit devices including forming self aligned contact regions. The method includes providing a partially completed semiconductor wafer, the wafer including one or more semiconductor chips, where each of the chips including a plurality of MOS gate structures. Each of the gate structures is formed on a substrate and having a first layer of silicon nitride formed overlying portions including a contact region between the gate structures. Each of the chips has conformal layer of doped silicon glass of a predetermined thickness overlying the silicon nitride layer and the gate structures. The method then applies a plasma etching process to the doped silicon glass to expose a portion of the first silicon nitride layer using an anisotropic etching component to vertically remove portions of the doped silicon glass. A step of cleaning the exposed portion of silicon nitride using an isotropic component is also included. The method forms a second silicon nitride layer on the exposed portion of the second silicon nitride layer and removes the second silicon nitride layer and exposed portion of the first silicon nitride layer to expose the contract region on the substrate. The method processes the exposed contact region using a soft etching technique.

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Shanghai, China

Jin Kang