Samsung Electronics Co., Ltd.

Samsung Display Co., Ltd.

Jin-Hyun Kim

Jung-hwan Choi

Beung-Hwa Jeong

Hyun-Soo Choi

A mother panel for a display panel includes a first mother substrate and a second mother substrate that are spaced apart from each other to face each other, each of which includes at least one usable area that is usable as the display panel, and at least one unusable area that surrounds the usable area. The mother panel also includes a plurality of display panel patterns between the first mother substrate and the second mother substrate that are spaced apart from one another in the usable area, a seal pattern that adheres the first mother substrate with the second mother substrate and seals each of the plurality of display panel patterns, and an etching stopping unit that prevents an etchant from permeating between the first mother substrate and the second mother substrate and prevents a boundary area of an etching target surface from being etched.

Mother panel for display panel and method of manufacturing display panel using the mother panel

A nonvolatile memory device and system having a nonvolatile memory device accessible with a DRAM protocol for generating a first command signal and a second command signal based on a row address strobe signal and a column address strobe signal and storing an n-bit row address signal based on the first command signal, an n-bit column address signal based on the second command signal, and decoding the n-bit row address signal and the n-bit column address signal to synchronously provide a row selection signal and a column selection signal to a memory cell array.

Synchronous nonvolatile memory device and memory system supporting consecutive division addressing DRAM protocol

A simultaneous bi-directional signal transmission system includes a first semiconductor device, a second semiconductor device, and one or more transmission lines. The first semiconductor device includes a first output MUX which receives first binary data and converts the first binary data into a first signal having one of at least four levels; a first transmitter which is connected to the first output MUX and outputs the first signal via the transmission line to the second semiconductor device; a first receiver which compares one or more reference voltages selected by the first signal with a third signal input via the transmission line and outputs the comparison result; and a first input encoder which detects the second binary data based on the comparison result output from the first receiver. The second semiconductor device includes a second output MUX which receives second binary data and converts the second binary data into a second signal having one of at least four levels; a second transmitter which is connected to the second output MUX and outputs the second signal via the transmission line to the first semiconductor device; a second receiver which compares one or more reference voltages selected by the second signal with the third signal input via the transmission line and outputs the comparison result; and a second input encoder which detects the first binary data based on the comparison result output from the second receiver.

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Yongin, South Korea

Jin-Hyun Kim