Samsung Electronics Co., Ltd.

Jin-Hyeok Choi

Sam-Yong Bahng

Chil-Hee Chung

Sung-Hoon Lee

Si-Hoon Hong

Tae-Keun Jeon

Bong-Ryeol Lee

Youngjin Cho

Eun Chu Oh

Hwaseok Oh

Younggeun Lee

Hwa-seok Oh

Jae-Sung Yu

Hwa-Seok Oh

Hyun-Tae Park

Jong-uk Song

A storage device includes a nonvolatile memory including a plurality of nonvolatile memory cells, a write buffer memory storing first data and second data received from a host, and a storage controller storing the first data and the second data that are stored in the write buffer memory into the nonvolatile memory. The storage controller performs a first program operation and a second program operation on a plurality of first memory cells connected to a first word line group to store the first data, and performs a first program operation and a second program operation on a plurality of second memory cells connected to a second word line group to store the second data. While the storage controller performs the first program operation on the plurality of second memory cells, the first data is written in the write buffer memory.

Storage device including write buffer memory and method of operating storage device

An operating method of a semiconductor device and a memory system, each including a multi-connection port, includes: receiving connection information of a first device while connecting to the first device; updating information of a management table by using the connection information; and generating and transmitting a first packet including the connection information of the first device to a second device pre-connected to the memory system.

Operating methods of semiconductor device and memory system each including multi-connection port, and communication method of storage system

A memory system is provided includes a host processor, and a plurality of cascade connected memory cards connected to the host processor. Each of the memory cards stores a same default relative card address (RCA) prior to initialization of the memory system. The host processor is configured to sequentially access each memory card using the default RCA, and to change the default RCA to a unique RCA upon each sequential access.

Memory systems and methods of initiallizing the same

A nonvolatile memory system is operated by providing data to be written to a nonvolatile memory, logically combining the data to be written to the nonvolatile memory with a random pattern to generate encoded data; and programming the encoded data in the nonvolatile memory.

Systems, methods and computer program products for encoding data to be written to a nonvolatile memory based on wear-leveling information

A data processing method of a memory system including a flash memory, which includes judging whether data initially read from a selected page of the flash memory is correctable. If the initially read data is judged not to be correctable, the data is newly read from the selected page based upon each of newly determined read voltages. Thereafter, error-free sub-sectors of the newly read data are collected based upon EDC data corresponding to the initially read data. The data of the error-free sub-sectors are then corrected based upon ECC data corresponding to the initially read data.

Memory system and data processing method thereof

Memory systems and methods of initializing the same

A method of programming a multilevel cell flash memory includes dividing a memory cell array of the flash memory into a user block and a cache block, programming first LSB data into a page of the user block, programming first MSB data into the page of the user block after programming the first LSB data, programming second LSB data into a page of the cache block, and storing control data for controlling the flash memory in the cache block.

Programming methods of memory systems having a multilevel cell flash memory

A memory card includes a non-volatile memory; and a power management unit for receiving an external supply voltage to supply an operating voltage to the non-volatile memory. The power management unit boosts/bypasses the external supply voltage based on whether the external supply voltage is lower than a detection voltage and then outputs the boosted/bypassed voltage as the operating voltage of the non-volatile memory.

Portable data storage apparatus

A nonvolatile memory system includes a host system, a memory controller, and a flash memory chip including multi-level flash memory cells. The memory controller includes a backup memory adapted to store a backup copy of previously programmed data from the multi-level flash memory cells when further programming of the multi-level flash memory cells fails. The backup copy of the previously programmed data is used to detect and correct any errors in the previously programmed data before reprogramming the previously programmed data to different multi-level memory cells in the nonvolatile memory system.

Nonvolatile memory system and associated programming methods

A memory system includes a flash memory storing multi-bit data in one memory cell. A memory controller controls the flash memory to program the multi-bit data in the memory cell. The flash memory programs the multi-bit data in the memory cell in a single program operation.

Memory system including MLC flash memory

Provided are a memory system and a program method. The memory system includes a flash memory and a memory controller. The flash memory stores first bit data and then stores second bit data in a multi-level memory cell. The memory controller includes a buffer memory temporarily storing the first bit data and the second bit data, and a backup memory storing the first bit data while the flash memory is storing the second bit data. The backup memory re-programs the first bit data to the flash memory upon detecting a program failure associated with the storing the second bit data.

Memory system with backup circuit and programming method

A nonvolatile memory system includes a host system, a memory controller, and a flash memory chip including multi-level flash memory cells. The memory controller includes a backup memory adapted to store a backup copy of previously programmed data from the multi-level flash memory cells when the multi-level flash memory cells are further programmed. Where an error or malfunction occurs during the further programming of the multi-level flash memory cells, the backup copy of the previously programmed data is used to program different multi-level flash memory cells.

A data storage circuit and a data preservation method for preserving data when a semiconductor device is in a sleep mode using a test scan chain are provided, where the data storage circuit includes a sleep mode control unit and a scan chain unit, the sleep mode control unit outputs a scan control signal and a scan clock signal in response to one of a test control signal and a sleep mode control signal received from the outside, stores an output data signal in a memory when the output data signal is received, and outputs a test pattern data signal as a scan data signal when the test pattern data signal is received, the scan chain unit outputs a normal data signal stored inside of the scan chain unit as the output data signal to the sleep mode control unit or receives and outputs the scan data signal to a combinational circuit unit in response to the scan control signal and the scan clock signal, and the data storage circuit and the data preservation method prevent a loss of data in a sleep mode of a semiconductor device, and reduce power consumption in a standby state.

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Yongin-si, South Korea

Jin-Hyeok Choi