Samsung Electronics Co., Ltd.

Jin-Hun Jang

Tae-Young Oh

Kyung-Soo Ha

Young-Hwa Kim

Seok-Jin Cho

A memory device includes a first switch for switching a first power voltage and transmitting the first power voltage to a common node of a first power rail. A second switch switches a second power voltage and transmits the second power voltage to the common node. A control logic generates a first control signal for controlling the first switch during initial driving of the memory device. A masking circuit controls the first switch to maintain a turn on state in at least a partial period of the initial driving period of the memory device by providing a first masking control signal obtained by masking the first control signal to the first switch.

Memory device including dynamic voltage and frequency scaling switch and method of operating the same

A memory device has a plurality of power rails, including: a first power rail for transmitting a high power voltage, a second power rail for transmitting a low power voltage, a third power rail for selectively receiving the high power voltage from the first power rail through a first dynamic voltage and frequency scaling (DVFS) switch and for selectively receiving the low power voltage from the second power rail through a second DVFS switch, a fourth power rail connected to a first power gating (PG) switch to selectively receive the high power voltage or the low power voltage from the third power rail, and a first circuit block connected to the fourth power rail to receive a power voltage to which the DVFS and PG are applied. When power gating is applied, supply of the power voltage to the fourth power rail is blocked.

Growing community of inventors

Uiwang-si, South Korea

Jin-Hun Jang