Dongbu Hitek Co., Ltd.

Hanlim Pharmaceutical Co., Ltd.

Korea Research Institute of Chemical Technology

Catholic University Industry Academic Cooperation Foundation

Dongbu Hitekco., Ltd.

Catholic University Academic Cooperation Foundation

Jin-Ha Park

Geun-Hyeog Lee

Mi-La Cho

Hye-Jwa Oh

Yun-Ju Woo

Eun-Young Kwak

Byong-Sun Choi

Jun-Ki Min

Sung-Eun Yoo

Choun-Ki Joo

Jae-Hee Kim

Jun-Sub Choi

Kyu-Yang Yi

Jee-Hee Suh

Joo-Yeon Jhun

Eun-Mi Kim

Sang-Yong Lee

Mi-Jin O

Hye-Sung Lee

Yun-Seok Cho

Young-Ok Jung

Jong-Hyeon Ryu

Jae-Sik Yang

Se-Wan Park

Nack-Jeong Kim

Jae-Shin Kim

Jin-Sun Kim

The present invention provides a pharmaceutical composition for preventing or treating macular degeneration, which comprises benzopyran derivatives substituted with secondary amines including imidazole or pharmaceutically acceptable salts thereof as an active ingredient. The pharmaceutical composition of the present invention may be used in the form of eye drops.

Pharmaceutical composition for preventing or treating macular degeneration

The present invention provides a method for preventing or treating osteoarthritis comprising administrating rebamipide or a pharmaceutical composition comprising rebamipide as an active ingredient and a pharmaceutically acceptable carrier to a subject in need thereof. The pharmaceutical composition may be for oral administration, for example an oral solid dosage form of a tablet or capsule form. The pharmaceutical composition may be formulated into a unit dosage form suitable for orally administering rebamipide in a dose ranging from 0.5 to 50 mg/kg, preferably from 0.6 to 6 mg/kg.

Pharmaceutical composition for the prevention or treatment of osteoarthritis containing rebamipide as an active ingredient

The present invention provides a pharmaceutical composition for nasal administration comprising mometasone furoate and azelastine hydrochloride, wherein the pharmaceutical composition comprises thaumatin as an agent for reducing bitterness and irritation.

Pharmaceutical composition including mometasone furoate and azelastine hydrochloride for nasal administration

The present invention provides a pharmaceutical composition for preventing or treating rheumatoid arthritis comprising rebamipide as an active ingredient and a pharmaceutically acceptable carrier. The pharmaceutical composition may be for oral administration, for example an oral solid dosage form of a tablet or capsule form. The pharmaceutical composition may be formulated into a unit dosage form suitable for orally administering rebamipide in a dose ranging from 0.5 to 50 mg/kg, preferably from 0.6 to 6 mg/kg.

Pharmaceutical composition for preventing or treating rheumatoid arthritis, containing rebamipide

A flash memory device may include a device isolation layer and an active area formed over a semiconductor substrate, a memory gate formed over the active area, and a control gate formed over the semiconductor substrate including the memory gate, wherein the active area, where a source contact is to be formed, has the same interval spacing as a bit line, and a common source line area, where the source contact is to be formed, has an impurity area connecting neighboring active areas.

Flash memory device and manufacturing method of the same

Embodiments relate to a manufacturing method of a flash memory device which improves electrical characteristics by reducing or preventing void generation. A manufacturing method of a flash memory device according to embodiments includes forming a plurality of gate patterns over a semiconductor substrate including a tunnel oxide layer, a floating gate, a dielectric layer, and a control gate. A spacer layer may be formed as a compound insulating layer structure over the side wall of the gate pattern. A source/drain area may be formed over the semiconductor substrate at both sides of the control gate. An insulating layer located at the outermost of the spacer layer may be removed. A contact hole may be formed between the gate patterns by forming and patterning the interlayer insulating layer. A contact plug may be formed in the contact hole.

Manufacturing method of flash memory device

A flash memory device having a spacer of a gate region formed in an oxide-nitride-oxide (ONO) structure and a source/drain region formed using the ONO structure. The outermost oxide in the ONO structure is removed and an interlayer insulating film is formed to ensure sufficient space between the gate regions. Thus, it is possible to prevent a void from being generated in the interlayer insulating film and prevent a word line from being electrically connected to a drain contact for forming a bit line.

Flash memory device and method of manufacturing the same

Embodiments relate to a flash memory device and a method of manufacturing the same that may include a tunnel oxide layer on and/or over a semiconductor substrate having source and drain regions. The tunnel oxide layer may have a first width. The flash memory device may include a first polysilicon pattern and a second polysilicon pattern on and/or over the tunnel oxide layer and a dielectric pattern on and/or over the tunnel oxide layer, where the first and second polysilicon patterns may be provided. It may also include a third polysilicon pattern on and/or over the dielectric pattern, the third polysilicon pattern having a second width, and a spacer formed on and/or over sidewalls of the first, second and third polysilicon patterns, the dielectric pattern and the tunnel oxide pattern. According to embodiments, the second width may be greater than the first width.

Embodiments relater to a semiconductor device and a method of fabricating the same. A source/drain area may be formed by using the spacer having the dual structure of the oxide layer and nitride layer. After etching a part of the oxide layer, the salicide layer may be formed on the gate electrode and the source/drain area, and the spacer may be removed. The contact area may be ensured, so a higher degree of integration may be achieved.

Semiconductor device

Embodiments relate to a method of forming a 90 nm semiconductor device, including forming an isolation film within a semiconductor substrate in which a pMOS region and an nMOS region are defined. A first mask is formed to shield the nMOS region by using a DUV photoresist having a thickness of approximately 0.7 to 0.75 &#x3bc;m. Ions are implanted into the pMOS region to form a p type well. A second mask is formed to shield the pMOS region by using a DUV photoresist having a thickness of approximately 0.7 to 0.75 &#x3bc;m. Ions are implanted into the nMOS region to form an n type well. A gate oxide film and a gate is formed over the semiconductor substrate. A low-concentration impurity may be implanted by using the gate as a mask. An LDD region may be formed. A sidewall spacer may be formed over both sidewalls of the gate. A high-concentration impurity is implanted by using the sidewall spacer as a mask, forming a source/drain region.

Method of forming semiconductor device

A method of manufacturing a semiconductor device including at least one step of: forming a transistor on and/or over a semiconductor substrate; forming silicide on and/or overa gate electrode and a source/drain region of the transistor; removing an uppermost oxide film from a spacer of the transistor; and forming a contact stop layer on and/or over the entire surface of the substrate including the gate electrode.

Growing community of inventors

Gyeonggi-do, South Korea

Jin-Ha Park