Samsung Electronics Co., Ltd.

Ajou University Industry-academic Cooperation Foundation

Ajou University Industry Cooperation Foundation

Jin Do Byun

Jung Hwan Choi

Young Don Choi

Joo Hwan Kim

Jang Woo Lee

Eun Seok Shin

Dae Hoon Na

Jeong Don Ihm

Hai-Young Lee

Jong Ho Bang

Byung Chang Kang

Byung Moo Lee

Jun Young Park

Hyun-Yoon Cho

Pan Suk Kwak

Su Cheol Lee

Myung Hun Lee

Hai Young Lee

Min Jae Lee

Ki-Bum Kang

Dae Keun Cho

Young-hoon Son

Kwang Seob Shin

A non-volatile memory chip comprises a cell region that includes a first surface, a second surface opposite to the first surface, a first cell structure, and a second cell structure spaced apart from the first cell structure; a peripheral circuit region on the first surface of the cell region, and that includes a first peripheral circuit connected to the first cell structure, a second peripheral circuit connected to the second cell structure, and a connection circuit between the first and second peripheral circuits; a through via between the first and second cell structures and that extends from the second surface of the cell region to the connection circuit of the peripheral circuit region; a redistribution layer that covers the through via on the second surface of the cell region, is connected to the through via, and extends along the second surface; and a chip pad connected to the redistribution layer.

Nonvolatile memory chip and semiconductor package including the same

A method includes measuring a linearity of a first pull-up circuit, a second pull-up circuit, a third pull-up circuit, a first pull-down circuit, a second pull-down circuit and a third pull-down circuit using an initial pull-up code and an initial pull-down code, each of the first pull-up circuit, the second pull-up circuit and the third pull-up circuit having a respective resistance value determined based on a respective pull-up code, and each of the first pull-down circuit, the second pull-down circuit and the third pull-down circuit having a respective resistance value determined based on a respective pull-down code, and determining a calibration setting indicator based on the measurement result, the calibration setting indicator indicating a calibration method of a transmission driver including the first pull-up circuit, the second pull-up circuit, the third pull-up circuit, the first pull-down circuit, the second pull-down circuit and the third pull-down circuit.

Memory device and method for calibrating the device and fabricating the device

A memory device, a host device and a method of operating the memory device are provided. The memory device includes a data signal generator configured to provide a data signal to a transmission driver, the transmission driver configured to output a multi-level signal having any one of first to third signal levels based on the data signal, a command decoder configured to receive a feedback signal from outside of the memory device and decode the feedback signal, a data signal controller configured to adjust the data signal based on a decoding result of the command decoder, and a drive strength controller configured to adjust at least one of the first to third signal levels based on the decoding result of the command decoder.

Memory device, host device and method of operating the memory device

Provided are multi-chip packages. A multi-chip package includes a first memory chip and a second memory chip on a printed circuit board; a memory controller electrically connected to the first memory chip and the second memory chip via a first bonding wire and a second bonding wire; and a strength control module configured to control a drive strength of each of a first output driver of the first memory chip and a second output driver of the second memory chip, wherein the memory controller includes an interface circuit configured to receive each of first test data and second test data from the first output driver and the second output driver in which the drive strength is set by the strength control module, and output detection data for detecting whether the first bonding wire and the bonding wire are short-circuited based on the first and second test data.

Multi-chip package

A folded corrugated substrate integrated waveguide is disclosed. The folded corrugated substrate integrated waveguide, according to one embodiment of the present invention, comprises: a first conductor plate having upper surface stubs respectively formed on both sides thereof in the lengthwise direction; a first dielectric substrate of which the upper surface is attached to the lower surface of the first conductor plate; a second conductor plate of which the upper surface is attached to the lower surface of the first dielectric substrate; a second dielectric substrate of which the upper surface is attached to the lower surface of the second conductor plate; and two stub conductor arrays spaced at a certain distance so as to be arranged in parallel to each other and attached to the lower surface of the second dielectric substrate, wherein each of the stub conductors in the two stub conductor arrays is electrically connected to a position corresponding to the upper surface stub of the first conductor plate through a via-hole which vertically penetrates the first dielectric substrate, the second conductor plate, and the second dielectric substrate.

Folded corrugated substrate integrated waveguide

An antenna and a communication system with the antenna are provided. The antenna may include a first layer including a plurality of folded stubs, a second layer including a pattern of the folded stubs, and a third layer connected to ground is disposed between the first layer and the second layer.

Antenna and communication system including the antenna

Provided is a phase shifter using a substrate integrated waveguide (SIW). The phase shifter includes: a substrate; and a waveguide integrated on the substrate, wherein the waveguide includes an input port, an out port, two columns of via walls which are separated by a width of the waveguide and are arranged parallel to each other, and either a plurality of air holes which are formed to shift a phase of a signal between the input port and the output port or a plurality of rods, each including an air hole and a dielectric material inserted into the air hole.

Phase shifter using substrate integrated waveguide

Growing community of inventors

Suwon-si, South Korea

Jin Do Byun