Samsung Electronics Co., Ltd.

Jin-Aeon Lee

Young-jin Chung

Jong-Hwa Lee

Woong-Hee Lee

Yun-Tae Lee

Young-Jun Kim

Jung-Sun Kang

Woon-Sik Suh

Byeong-Whee Yun

Jeon Taek Im

Yong-Ha Park

Jin-Hyun Cho

Yun-Kyoung Kim

Young-Ha Park

Min-Su Lim

An image sensing device includes a single-color image sensor and a multi-color image sensor having resolutions different from each other; image data receiving circuitry configured to receive first image data from the single-color image sensor and second image data from the multi-color image sensor; first preprocessor circuitry configured to generate first aligned image data and second aligned image data based on the first image data and the second image data, respectively, by correcting an optical path difference between a pixel stream of the first image data and a pixel stream of the second image; and second preprocessor circuitry configured to generate third image data by merging the first aligned image data and the second aligned image data.

Image sensing device and image processing system using heterogeneous image sensor

Digital logic processing devices capable of reduced power consumption may be provided. A digital logic processing device may include one or more processing elements, an input FIFO for storing data, a processing unit, and a clock controller circuit. The processing unit may process data from the input FIFO and the clock controller circuit may control a clock signal supplied to the input FIFO and the processing unit. The clock controller circuit may monitor whether there is data to be transferred to the input FIFO and states of the input FIFO and the processing unit and may control the clock signal.

Instantaneous data-driven clock-gating device and hard-wired streaming processing system including the same

A memory controller having graphic processing function that includes a graphic processing unit operating in response to a selection signal from a master, and a memory interface for storing outputs of the graphic processing unit in an external memory at and receiving graphic data from the external memory to provide the graphic data to the graphic processing unit.

Memory controller with graphic processing function

A communication device and method is provided, comprising: a signal modulator/demodulator having a digital signal processor for effecting radio communications; and an application processor (AP) having a central processing unit and a master controller for controlling via a common bus a plurality of peripherals including an interface with the signal modulator/demodulator, wherein a memory shared by the modem and the AP is controlled via the interface. The plurality of peripherals include at least one of an image capture module, a display, and a flash memory. The master controller controls the plurality of peripherals by issuing a packetized command commonly receivable by the plurality of peripherals over the common bus, the packetized command includes a module device select signal used for selecting one of the peripherals.

Communication device and method having a common platform

A camera interface employing a direct memory access (DMA) unit to digitally perform an image transformation such as 'flipping' and 'rotating' an image (e.g., to correct for X-axis, Y-axis, or XY-axes mirroring). The image transforming DMA unit includes an address generator and a data selector. The address generator appropriately modifies a frame start address, a burst transfer address, a line start address, of an image frame, based on the X, Y, or XY mirrored image mode. The data selector changes the sequences of words and of pixels in a word based upon the mirrored image mode. The data selector includes a plurality of pixel-sequence modifying multiplexers each for selecting between a word having an original pixel sequence stored in the buffer memory and a word having the reverse pixel sequence; and a word-sequence modifying multiplexer outputting the selected words in the original word sequence or in the reverse word sequence in response to outputs of a counter that increments or decrements based upon the mirrored image mode.

Camera interface and method using DMA unit to flip or rotate a digital image

Provided are a memory controller for controlling a refresh cycle of a memory and a method thereof. In this method, a temperature measure command is generated to measure an operating temperature of the memory. Next, a measured temperature in response to the temperature measure command is received. Then, a temperature difference between the measured temperature and a reference temperature is detected if the measured temperature is different from the reference temperature to change the refresh cycle according to the temperature difference, and if the measured temperature is equal to the reference temperature the method returns to the temperature measure command generating step. Thereafter, a refresh command is applied to the memory in response to the changed refresh cycle.

Memory controller for controlling a refresh cycle of a memory and a method thereof

A host integrated circuit device can include a host interface circuit that is configured to access a resource associated with the host integrated circuit device in a first device interface format based on a request from a remote integrated circuit device located outside the host integrated circuit device in a second device interface format.

Growing community of inventors

Suwon-si, South Korea

Jin-Aeon Lee