Honeywell G.m.b.h.

Jimmy Yee

Donald D Johnson

Kenneth F Barnes

An overcurrent protection circuit is provided with a counter which permits a preselected number of reinitiations of current following the detection of an overcurrent condition. Each stoppage of current in response to the detection of an overcurrent condition is followed by a predetermined time delay and a subsequent reinitiation of current. After the predetermined number of reinitiations, current is permanently stopped from flowing between first and second circuit points until a manual reset occurs.

Short circuit and overload protection circuit which allows a

An asynchronous photodetector circuit is provided to interrogate incoming signals and determine whether the frequency of those incoming signal pulses is acceptable. The circuitry of the present invention permits a series of incoming pulses to be interrogated to determine whether the frequency of those pulses is acceptable and can be assumed with confidence to be emanating from an appropriate light source. Upon the receipt of a first input signal pulse, a time window is created by the present invention to define a period to time during which a subsequent input signal pulse is to be expected. Other than during the duration of the time window, the present invention will not accept an input signal pulse and will not count that pulse as having been received. Each properly received pulse creates a subsequent time window until a predetermined number of consecutive pulses is received during their time windows. When that predetermined number is received, a signal is provided. In a particularly preferred embodiment of the present invention, the signal that the predetermined number of consecutive pulses have been received is used to lower the threshold voltage of a comparator for the purpose of facilitating receipt of subsequent signals once the appropriateness of the incoming stream of pulses is determined.

Asynchronous signal interrogation circuit for an detection apparatus

An electronic circuit for interfacing a sensor of either current sourcing or current sinking type to a data bus requiring signals of predetermined characteristics, the circuit including first and second level comparators set to different reference levels so as to define a window between the reference levels at which neither comparator is actuated. A sensor input terminal is biased to a level between the reference levels of the comparators, but varies to a level outside the window in response to current flowing from or into the sensor terminal. The comparator output terminals are connected to an output circuit which produces a signal suitable for transmission on the data bus in response to actuation of either comparator.

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Rockford, IL, United States of America

Jimmy Yee