Advanced Micro Devices Corporation

Jimmy R Madewell

N Bruce Threewitt

Joseph A Brcich

Roy J Levy

A programmable event generator for generating digital timing waveforms in response to a triggering signal includes one programmable read-only memory for storing and outputting data words corresponding to the digital timing waveforms and next address words to address another of the data words, a storage register for temporarily storing and outputting any one of the data words and next address words, another mapping programmable read-only memory for storing and outputting starting address words to start the addressing of the one programmable read only memory, a multiplexer to select either a starting address word or a next address word to address the one programmable read-only memory, and a programmable control circuit, responsive to the triggering signal, for clocking the storage register at a programmed clock frequency.

Apparatus for generating digital timing waveforms

A computer system having a central processing unit, a dynamic memory controller, an error detection and correction network and a dynamic memory for storing data that are subject to being refreshed and to data bit errors. The dynamic memory controller has a refresh mode for controlling access to the memory only to refresh the data, a refresh with error detection and correction mode, for controlling access to the memory to merge or simultaneous refresh a row of data while detecting and correcting data bit errors, and a read/write mode for controlling access to the memory in response to CPU requests for a read/write memory operation.

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San Jose, CA, United States of America

Jimmy R Madewell