Packard Bell Nec

Zenith Data Systems Corporation

Other

Jimmy Dean Smith

Mark D Nicol

Terence Paul O'Brien

Brian K Straup

Mark L Herman

Anthony M Olson

Michael P Krau

Thomas N Robinson

Todd R Witkowski

Richard David Ball

Richard A Hamersley

Terrence A Hussey

The present invention relates to a computer system and more particularly to a computer system which allows option controller cards for various input/output (I/O) devices to be added on the motherboard at minimum cost.

Expansion module including programmable chip selects

Programmably selectable addresses for expansion cards for a motherboard

A system for upgrading a personal computer includes a motherboard having upgrade sockets for upgrading the CPU and the clock oscillator without the need to remove any components. The system includes sensing circuitry for detecting the type of component plugged into the upgrade socket and circuitry for disabling the upgraded component. In addition, the system includes software for reconfiguring various signals depending on the particular upgrade plugged into the upgrade socket. By providing a system that can be upgraded by merely inserting a newer components, upgrades can be performed rather quickly. In addition, the upgrade system allows the end user a plurality of upgrade options while at the same time allows the end user to take advantage of declining CPU prices.

Processor upgrade system for a personal computer

System for establishing a transfer mode between system controller and

Manual insertion of hardware jumpers to configure I/O device selection and addressing is eliminated through the implementation of specialized hardware which allows for program control over several addressing paths. A register file is utilized within a programmable device to configure demultiplexers and multiplexers which map I/O address control line signals to set up various communication paths for address I/O exchanges. I/O configuration is entirely removed from add-on cards through the use of the programmable device. Accordingly, such add-on cards only require minimum circuitry, thus facilitating the use of miniature or baby cards as option cards which are much smaller than standard add-on cards.

Apparatus for selecting a user programmable address for an I/O device

The present invention relates to a method and apparatus to provide a write only register that is implemented with a low cost device yet provides the means whereby the register may be read, glitch free, using a predetermined procedure.

Method and apparatus for reading data from a write only port

This invention relates to a system for providing programmable configuration protection of a programmable Input/Output device. By configuration protection, it is meant that the programming options of an I/O controller can be set in accordance to a given environment, and then by use of a programming controlled signal, prevent the changing of the programmed environment or remove those programmed options considered unsafe in the now secured environment.

Method and apparatus for preventing unauthorized access to peripheral

A control circuit which allows computer systems to modify signal timing relationships in the hardware via programmable ports in the system, thereby allowing timing adjustments to be made without effecting motherboard hardware. The control circuit includes a plurality of delay devices configured to provide a plurality of delays under program control. The control circuit is adapted to extend the duration of a write signal to enable data to be latched, normally on the trailing edge of the write signal to avoid latching invalid data.

Method and apparatus for providing a data write signal with a

A system includes a system bus having data lines, an acknowledge line, an enable line, and a control line, a data storage device, a controller circuit, and an arrangement coupling the system bus, controller circuit and data storage device. The system bus can carry out a data transfer cycle in which the acknowledge, enable and control lines are actuated and the controller obtains and checks data from the data storage device and supplies it to data lines of the bus, and a verify cycle in which the acknowledge and enable lines are actuated and the control line is deactuated and the controller obtains and checks data from the storage device but does not supply it to the bus. The controller circuit is capable of operating in different modes, in one of which it forcibly sets a false error indication in response to the verify cycle. In response to the acknowledge line and enable line being simultaneously actuated while the control line remains deactuated throughout a cycle, an arrangement supplies a special signal to the controller circuit so that the controller circuit interprets the cycle as a data transfer cycle and does not set a false error indication.

Floppy disk controller interface for suppressing false verify cycle

A vertically extending framework having a hydraulic ram subassembly mounted in the framework for pivotation about a horizontal axis, and spaced from the lower end of the framework to accommodate a refuse receptacle within the framework under the ram. A disinfectant injection pump is mounted in the hydraulic ram for automatically discharging a disinfectant into refuse compressed by the ram. The ram is double acting, and valve means is provided for automatically retracting the ram when a predetermined force opposes the outward extension of the piston of the ram.

Growing community of inventors

Stevensville, MI, United States of America

Jimmy Dean Smith