Microchip Technology Inc.

Jim Nolan

Serban Motoroiu

Dong Wang

Kumen Blake

Milan Rai

HongZhong Xu

A circuit for electrostatic discharge (ESD) protection may protect sensitive circuits in the presence of both positive and negative ESD events. A protection transistor may be coupled to a pad, and a protection clamp may be coupled to the protection transistor. The protection transistor may be in an isolation n-well, and a current limiting resistor may be coupled from the pad to the isolation n-well. In operation, the current limiting resistor may limit the current during negative ESD events.

Device and system for ESD protection

A high side current sensing amplifier architecture is simplified and improved over prior art current sensing amplifier circuits by using chopping only, without requiring auto-zeroing, and by using a simpler (and faster) switched capacitor filter instead of an auto-zeroing integrator filter. Also, VIP (positive DC sense node) is merged with the VDDHV (power supply) node, such that the integrated circuit package requires only a single node (package pin) to accommodate both the VIP and VDDHV connections for the current sensing amplifier circuit, resulting in being able to use a smaller integrated circuit package. A small resistor is coupled between VIP and VDDHV to reduce the offset considerably. A low latency time high voltage level shifter is provided which is essential for precise chopping operation.

Current sense amplifier architecture and level shifter

An amplifier includes a differential positive input, a differential negative input, and a transistor. The transistor is communicatively coupled to the differential positive input and differential negative input at a source of the transistor. The transistor is configured to track input common mode of the differential positive input and differential negative input.

Common mode sensing architecture

A current feed-back instrumentation amplifier (CFIA) comprises a differential pair with degeneration for amplifying small differential voltages in the presence of large common-mode voltages. The CFIA includes input and feedback transconductors and a chopping modulator circuit that continuously swaps tail current sources between the transconductors. This tail current swapping reduces the contribution to the CFIA's gain error caused by random mismatch between the tail currents of the input and feedback transconductors. The modulator circuit operates on a clock cycle to periodically swap the tail current sources. As a result, even if the tail currents are mismatched, on average the tail currents (transconductor gains) will approximately equal out, and the contribution of the tail current difference to the gain error is canceled out.

Dynamic correction of gain error in current-feedback instrumentation amplifiers

A current feed-back instrumentation amplifier (CFIA) comprises a differential pair with degeneration for amplifying small differential voltages in the presence of large common-mode voltages. The CFIA includes input and feedback transconductors and a trimming circuit that trims the back-bias voltages of the transistors in each transconductor. The trimming circuit includes a plurality of selectable resistors disposed in the signal path of the tail current in each transconductor. Each of the plurality of selectable resistors has a switch coupled to it. When a switch is closed, only the resistors up to the respective switch are in the signal path of the bulk-to-source voltage of the differentially paired transistors. The resistor trimming circuit reduces the mismatch between transconductances of the respective differential pair transistors, in turn reducing mismatch of the overall transconductances of the transconductors, and thereby reducing the CFIA's gain error.

Methods of adjusting gain error in instrumentation amplifiers

An integrated circuit operational amplifier (op amp) is protected from input voltage levels which may cause output phase reversal of the op amp. Voltage comparators monitor the input voltages to the op amp differential input transistor pair. The op amp and comparators may be fabricated on an integrated circuit substrate and packaged in an integrated circuit package When the input voltage is of such a value which may cause output phase reversal, a comparator senses same and is coupled to circuits within the op amp which prevent the op amp output voltage from going into phase reversal.

Amplifier phase reversal suppression

An integrated circuit operational amplifier (op amp) is protected from input voltage levels which may cause output phase reversal of the op amp. Voltage comparators monitor the input voltages to the op amp differential input transistor pair. The op amp and comparators may be fabricated on an integrated circuit substrate and packaged in an integrated circuit package. When the input voltage is of such a value which may cause output phase reversal, a comparator senses same and is coupled to circuits within the op amp which prevent the op amp output voltage from going into phase reversal.

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Chandler, AZ, United States of America

Jim Nolan