Intel Corporation

Institute for the Development of Emerging Architecture L.l.c.

Jim Hays

Koichi Yamada

Gary N Hammond

Dean A Mulla

Nhon Toai Quach

Jonathan Kent Ross

William R Bryg

Stephen G Burger

John Wai Fu

Len J Schultz

Processor implementation-specific instructions save a processor state in a system memory and attempt to correct the error. Control is then transferred to processor-independent instructions. Control is returned to the processor implementation-specific instructions which then return to an interrupted context of the processor by restoring the processor state.

Method of correcting a machine check error

A method and apparatus for implementing a page table walker that uses at least one of a default page size and a page size selected for a virtual address space to position a sliding field in a virtual address. According to one aspect of the invention, an apparatus for use in a computer system is provided that includes a page size storage area and a page table walker. The page size storage area is used to store a number of page sizes each selected for translating a different set of virtual addresses. The page table walker includes a selection unit coupled to the page size storage area, as well as a page entry address generator coupled to the selection unit. For each of the virtual address received, the selection unit positions a field in that virtual address based on the page size selected for translating the set of virtual addresses to which that virtual address belongs. In response to receiving the bits in the field identified for each of the virtual addresses, the page entry address generator identifies an entry in a page table based on those bits.

Page table walker that uses at least one of a default page size and a

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San Jose, CA, United States of America

Jim Hays