Samsung Display Co., Ltd.

Samsung Displayco., Ltd.

Jihyun Ka

Hwayoung Song

Wonkyu Kwak

Wonse Lee

Yunkyeong In

Youngsoo Yoon

Hyunji Cha

Jintae Jeong

Dongeup Lee

Donghyeon Jang

Yujin Jeon

Sukyoung Kim

Minku Lee

Hansung Bae

Minhee Choi

Kimyeong Eom

Kwangsae Lee

Soongi Kwon

Jieun Lee

Byungsun Kim

Seungwoo Sung

Ilgoo Youn

Junyoung Jo

Chulkyu Kang

Seunghan Jo

Minwoo Byun

Minchae Kwak

Minjoo Kim

Kyonghwan Oh

Nackhyeon Keum

Seoni Jeong

Sungchan Hwang

Yangwan Kim

Sujin Kim

Jaehoon Lee

Seokje Seong

Jisu Na

Joosun Yoon

Seunghee Lee

Haijung In

Minjeong Kim

Haeyeon Lee

Chaehan Hyun

Hyeongjun Jin

Donghwan Jeon

Jongseok Woo

A display apparatus includes a pixel, a first scan driving circuit that transmits a first scan signal to the pixel based on a first gate voltage, a second gate voltage having a level lower than a level of the first gate voltage, and a first clock signal, and a second scan driving circuit that transmits a second scan signal to the pixel based on a third gate voltage having a level different from the level of the first gate voltage, a fourth gate voltage having a level lower than the level of the third gate voltage, and a second clock signal.

Display apparatus

A display apparatus including pixels, each including a driving transistor comprising a first terminal, a second terminal, a first gate, and a second gate electrically connected to the second terminal. Each pixel further includes a first transistor electrically connected to a driving voltage line and the first terminal of the driving transistor, a second transistor electrically connected to the second terminal of the driving transistor and a light-emitting diode, a first capacitor electrically connected to the first gate of the driving transistor and the second terminal of the driving transistor, and a second capacitor electrically connected to the driving voltage line and the second terminal of the driving transistor. A timing at which a first gate signal is applied to a gate of the first transistor and a timing at which a second gate signal is applied to a gate of the second transistor are different from each other.

A display device includes: a substrate including a transmission area and a display area surrounding the transmission area; a plurality of display elements in the display area; a plurality of first horizontal lines and a plurality of second horizontal lines each extending in a first direction and spaced apart from each other with the transmission area therebetween; a plurality of first vertical lines and a plurality of second vertical lines each extending in a second direction intersecting with the first direction and spaced apart from each other with the transmission area therebetween; and a first connection line connecting at least one of the plurality of first vertical lines to at least one of the plurality of second vertical lines and detouring around the transmission area, wherein the first connection line is on a same layer as at least one of the plurality of first horizontal lines.

Display device with connection lines around transmission area

Provided are a pixel configured to receive a first initialization voltage during a first period between a writing period of a first scan period and a first emission period of a frame and to receive a second initialization voltage different from the first initialization voltage from a start time point of a second period before a second emission period of a second scan period subsequent to the first scan period, a display apparatus including the pixel, and a driving method of the display apparatus.

Display apparatus and driving method of pixel

Provided is a display apparatus in which initialization and compensation of a pixel is implemented through a pixel including a thin film transistor connected to a node between a driving transistor and a light emitting diode.

A display device including: a substrate including a display area and a peripheral area adjacent to the display area; a plurality of data lines extending in a first direction in the display area; a fan-out unit arranged in the peripheral area and connected to the plurality of data lines; a first signal line arranged in the peripheral area; and a common power supply line arranged in the peripheral area and overlapping the fan-out unit.

Display device including a fan-out unit and test line in the peripheral area

A pixel includes a display element, a driving transistor, a storage capacitor, a scan transistor, and a gate control circuit. The display element may emit light for an emission period, wherein the display element includes an anode and a cathode. The driving transistor may control an amount of a driving current flowing through the display element, wherein the driving transistor includes a first gate and a second gate. The storage capacitor is electrically connected to the first gate of the driving transistor. The scan transistor may be turned on for a data-write period for transferring a data voltage to the driving transistor. The lower gate control circuit may electrically connect the second gate of the driving transistor to the anode of the display element for the emission period, and may apply a bias voltage to the second gate of the driving transistor for the data-write period.

Pixel and display apparatus

A display panel includes: a substrate including a first area and a second area surrounding the first area; a first initialization voltage line extending in a first direction and electrically connected to the first display element; a second initialization voltage line extending in the first direction and electrically connected to the second display element; an auxiliary voltage line arranged on a layer different from layers on which the first initialization voltage line and the second initialization voltage line are arranged and electrically connecting the first initialization voltage line and the second initialization voltage line that are apart from each other; and a first insulating layer covering the first initialization voltage line, the second initialization voltage line, and the auxiliary voltage line and arranged below the plurality of display elements.

Display panel including an initialization voltage line and an auxiliary voltage line and display device including the same

A pixel capable of adjusting a threshold voltage of a driving transistor, the pixel including: a display element configured to emit light during an emission period and including an anode and a cathode, the first transistor including an upper gate and a lower gate and configured to control a magnitude of a driving current flowing to the display element, a storage capacitor connected to the upper gate of the first transistor, and a second transistor configured to be turned on during a data writing period to transmit a data voltage to the first transistor, wherein a lower gate-source voltage of the first transistor has a first voltage level in the data writing period and a second voltage level in the emission period.

Pixel capable of adjusting a threshold voltage of a driving transistor

A display device includes a first light-emitting element disposed in a first display area, a second light-emitting element disposed in a second display area, a first pixel circuit disposed in the first display area, where the first pixel circuit output a first driving current for driving at least one selected from the first light-emitting element and the second light-emitting element, a first emission control transistor which connects the first pixel circuit to the first light-emitting element, and a second emission control transistor which connects the first pixel circuit to the second light-emitting element.

Display device

A display panel including a substrate including a display area surrounding an opening area and a non-display area between the opening area and the display area; a plurality of display elements on the display area; a plurality of scan lines extending in a first direction and detouring around an edge of the opening area; a plurality of data lines extending in a second direction that intersects with the first direction, the plurality of data lines detouring around the edge of the opening area; and a plurality of emission control lines extending in the first direction and detouring around the edge of the opening area.

Display panel

A display panel includes a substrate having a non-display area surrounding an opening area, and a display area outside the non-display area, a plurality of display elements arranged in the display area, a plurality of first lines extending in a first direction and bypassing the opening area along an edge of the opening area, a plurality of second lines extending in a second direction that crosses the first direction and, the plurality of second lines bypassing the opening area along the edge of the opening area, and a plurality of third lines extending in the second direction and bypassing the opening area along the edge of the opening area, at least one of the plurality of third lines including a circuitous portion between neighboring first lines of the plurality of first lines in the non-display area.

A display device includes a pixel connected to a data line, a data pad connected to the data line, and a first test area. The first test area includes a test control line transmitting a test control signal, a test signal line transmitting a test signal, and a first switch connected to the data pad. The first switch includes a gate electrode connected to the test control line, first and second semiconductor layers overlapping the gate electrode, a source electrode connected to the first and second semiconductor layers, and a drain electrode spaced from the source electrode and connected to the first and second semiconductor layers. The source electrode and the drain electrode are connected to the test signal line and data pad, respectively. One of the first or second semiconductor layers includes an oxide semiconductor and the other of the first or second semiconductor layer includes a silicon-based semiconductor.

Display device including a test unit

Display device including a fan out unit and a test line in the peripheral area

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Yongin-si, South Korea

Jihyun Ka