Hubei Yangtze Industrial Innovation Center of Advanced Display Co., Ltd.

Jiemiao Pan

Yuheng Zhang

Provided display panel includes pixel circuit and light emitting element. The pixel circuit includes drive module including a drive transistor, bias adjustment module to provide a bias adjustment signal to a first pole or a second pole of the drive transistor and initialization module to provide initialization signal to the light emitting element. Operation modes include a first mode and a second mode, and brightness level of the display panel in the first mode greater than that in the second mode. The pixel circuit includes data writing frame and holding frame, data writing frame in first mode corresponds to initialization signal of Vi, holding frame in first mode corresponds to initialization signal of Vi, data writing frame in second mode corresponds to bias adjustment signal of Vs, holding frame in second mode corresponds to bias adjustment signal of Vs, and |Vi−Vi|≠|Vs−Vs

Display panel, integrated chip, and display apparatus

Provided display panel includes a pixel circuit and a light emitting element. The pixel circuit includes a drive module, and a bias adjustment module; the drive module includes a drive transistor; and the bias adjustment module is configured to provide a bias adjustment signal to a first pole of the drive transistor or a second pole of the drive transistor. Operation modes of the display panel include a first mode and a second mode, and a brightness level of the display panel in the first mode is greater than a brightness level of the display panel in the second mode. The bias adjustment signal in the first mode is Vsand the bias adjustment signal in the second mode is Vs, and where Vs≠Vs

Provided display panel includes a pixel circuit and a light emitting element. The pixel circuit includes a drive module including a drive transistor, and a bias adjustment module configured to provide a bias adjustment signal to a first pole or a second pole of the drive transistor. Data refresh frequencies of the display panel include a first data refresh frequency Fand a second data refresh frequency F, where F>F. At the first data refresh frequency F, the bias adjustment signal is Vf, and at the second data refresh frequency F, the bias adjustment signal is Vf, where Vf≠Vf; or, at the first data refresh frequency F, a duration of a bias adjustment stage in one data refresh period is T, and at the second data refresh frequency F, a duration of a bias adjustment stage in one data refresh period is T, where T≠T

Provided display panel includes pixel circuit and light emitting element. The pixel circuit includes a drive module including a drive transistor, and a bias adjustment module to provide a bias adjustment signal to a first pole or a second pole of the drive transistor. Operation modes of the display panel include a first mode and a second mode, and a brightness level of the display panel in the first mode is greater than a brightness level of the display panel in the second mode. An operation process of the pixel circuit includes a data writing frame and a holding frame; the data writing frame and the holding frame in the first mode respectively correspond to a bias adjustment signal of Vs11 and Vs12; the data writing frame and the holding frame in the second mode respectively correspond to a bias adjustment signal of Vs21 and Vs22; where |Vs11−Vs12|=|Vs21−Vs22|.

Provided display panel includes pixel circuit and light emitting element. The pixel circuit includes a drive module including a drive transistor, and an initialization module to provide an initialization signal to the light emitting element. Operation modes of the display panel include a first mode and a second mode, and a brightness level of the display panel in the first mode is greater than a brightness level of the display panel in the second mode. An operation process of the pixel circuit includes a data writing frame and a holding frame; the data writing frame and the holding frame in the first mode respectively correspond to an initialization signal of Vi11 and Vi12; the data writing frame and the holding frame in the second mode respectively correspond to an initialization signal of Vi21 and Vi22; where |Vi11−Vi12|≠|Vi21−Vi22|.

Display panel and display apparatus

Display panel, integrated chip and display apparatus are provided. Display panel includes pixel circuit including drive module, bias adjustment module and initialization module, and light emitting element. Drive module configured to provide drive current to light emitting element, and includes drive transistor; bias adjustment module configured to provide bias adjustment signal to first pole or second pole of drive transistor; initialization module configured to provide initialization signal to light emitting element. Operation modes of display panel include first mode and second mode, and brightness level of display panel in first mode greater than that in second mode. Bias adjustment signal Vsin first mode and bias adjustment signal Vsin second mode satisfies Vs≠Vs; and/or, initialization signal Viin first mode and initialization signal Viin second mode satisfies Vi≠Vi. With embodiments of present disclosure, display uniformity of display panel can be improved.

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Wuhan, China

Jiemiao Pan