Altera Corporation

Jiefan Zhang

Allen Chen

Abdel Hafiz Rabi

Mark Jonathan Lewis

Herman Henry Schmit

Alexander Kugel

A virtualization platform for Network Functions Virtualization (NFV) is provided. The virtualization platform may include a host processor coupled to an acceleration coprocessor. The acceleration coprocessor may be a reconfigurable integrated circuit to help provide improved flexibility and agility for the NFV. The coprocessor may include multiple virtual function hardware acceleration modules each of which is configured to perform a respective accelerator function. A virtual machine running on the host processor may wish to perform multiple accelerator functions in succession at the coprocessor on a given data. In one suitable arrangement, intermediate data output by each of the accelerator functions may be fed back to the host processor. In another suitable arrangement, the successive function calls may be chained together so that only the final resulting data is fed back to the host processor.

Network functions virtualization platforms with function chaining capabilities

Techniques and mechanisms provide a flexible mapping for physical functions and virtual functions in an environment including virtual machines.

Flexible physical function and virtual function mapping

Integrated circuits such as application specific circuits or programmable logic devices may include specialized blocks such as configurable storage blocks and configurable processing blocks. Such specialized blocks may be controlled by clock signals and operated at single data rate or at double data rate. For instance, configurable storage blocks may be configured to use a double data rate communications scheme or a single data rate communication scheme to communicate data with other blocks. Configurable processing blocks may be configured to process data at a double data rate or a single data rate. Furthermore, configurable processing blocks that include accumulator circuitry may be configured to perform one accumulation at a single data rate or at a double data rate. Such configurable processing blocks may also be configured to perform two accumulations at a single data rate.

Methods for operating configurable storage and processing blocks at double and single data rates

A virtualization platform for Network Functions Virtualization (NFV) is provided. The virtualization platform may include a host processor coupled to an acceleration coprocessor. The acceleration coprocessor may be a reconfigurable integrated circuit to help provide improved flexibility and agility for the NFV. The traffic at the NFV platform may be controlled by a distributed Quality of Service (QoS) manager. The distributed QoS manager may include multiple QoS modules each of which serves to perform priority queuing independently for its associated component or interface. For example, the NFV platform may include a first QoS module for arbitrating among multiple virtual machines, a second QoS module for performing priority queuing for data packets received at an external network port, a third QoS module for arbitrating among memory accesses at a coprocessor external memory interface, fourth QoS module for arbitrating accesses among multiple hardware acceleration slices, etc.

Multilayer quality of service (QOS) for network functions virtualization platforms

A packet scheduler has input connections, and data packets received on the input connections can be placed in queues. The packet scheduler includes a first scheduler, for identifying a first of said queues according to a first queue scheduling algorithm, and a second scheduler, for identifying a second of said queues according to a second queue scheduling algorithm. The packet scheduler determines whether the first of said queues contains a packet of data to be sent and, if so, it selects the first of said queues as a selected queue. If the first of said queues does not contain a packet of data to be sent, it selects the second of said queues as a selected queue. The packet scheduler then determines whether the respective packet of data can be sent from the selected queue, by maintaining a deficit counter indicating a current data quota for the respective queue, and also by maintaining a global deficit counter.

Scheduling variable length packets

A scheduler includes a sorting unit that has n comparators to identify a smallest virtual finish time (VFT) value from 2VFT entries. Each of the VFT entries may include a valid bit to indicate its validity.

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San Jose, CA, United States of America

Jiefan Zhang