The University of Hong Kong

Jie Xiao

Kwan Lawrence Yeung

A computer-implemented method and system for determining a wiring network in a multi-core processor. The method includes determining, using a layered-and-progressive determination model, a wiring network including wiring path(s) for operably connecting multiple processor cores in the multi-core processor. The method also includes outputting a layout of the determined wiring network for display. The layered-and-progressive determination model is arranged to model the plurality of processor cores as a mesh of nodes arranged in the form of a rectangular array with n rows and m columns. Nested layer(s) are identified from the rectangular array. Each of the nested layers is formed by respective plurality of nodes connected in respective rectangular paths of the same shape but different sizes. A respective rectangular wiring path for each of the nested layer(s) is determined. The respective rectangular wiring paths are of the same shape but different sizes. If the nested layer(s) includes two or more layers, then for each of the respective rectangular wiring path, for each respective corner node of the respective rectangular wiring path, further rectangular wiring path(s) each connecting the respective corner node with at least one node in another one of the nested layer(s) is determined. The further rectangular wiring path(s) for each respective corner node are of the same shape but different sizes. The wiring network including the respective rectangular wiring paths and the further rectangular wiring paths is then formed.

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Hong Kong, China

Jie Xiao