Texas Instruments Corporation

Jie Xia

Freidoon Mehrad

Sandra S Zheng

Lancy Y Tsung

Mercer Brugler

Thomas M Ambrose

A method to implant NMOS polycrystalline silicon in embedded FLASH memory applications is described. In the method the polycrystalline silicon region ( ) that will used to form the gate electrode of the NMOS transistor is doped simultaneously along with the source line in the FLASH memory array.

Method to implant NMOS polycrystalline silicon in embedded FLASH memory applications

A method of forming a semiconductor component having a conductive line ( ) and a silicide region ( ) that crosses a trench ( ). The method involves forming nitride sidewalls ( ) to protect the stack during the silicidation process.

Sidewall process for forming a low resistance source line

A method to form an embedded FLASH integrated circuit with reduced processing steps is described. In the method a partial etch is performed on the control gate region of a polycrystalline silicon film ( ). A multiple etch process is then used to simultaneously form the FLASH memory cell gate stack ( ), the NMOS gate structure ( ) and the PMOS gate structure ( ).

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Plano, TX, United States of America

Jie Xia