Tritech Microelectronics International Ltd.

Jie Liang

Maisy Mun Ng

Kheng Boon Peh

Reginald Siang-Tze Wee

Siang Tze Wee

A three dimensional image detector is disclosed. The three dimensional image detector has a lensing system to focus incident light reflected from an object field upon a first and second image detector. The first and second image detectors are matrices of charge coupled devices. The first and second image detectors convert the incident light to electrical signals. The electrical signals from the first and second image detectors are converted in an analog to digital converter to a plurality of digital words that represent the magnitude of the light that impinges upon the first and second image detectors. The plurality of digital words are retained in a random access memory for processing within a digital signal processor. The digital signal processor will locate an object within the object field and determine the depth and contour information of the object and present this information with the plurality of digital words to external circuitry for further processing or display. The first and second image detectors, the analog-to-digital converter, the random access memory, and the digital signal processor are to be disposed upon an integrated circuit substrate.

3-D image detector

The present invention provides a voltage controlled oscillator with improved noise immunity and minimized variation due to manufacturing process, power supply and operating temperature changes. The voltage controlled oscillator consists of fully differential connected ring oscillator that includes a plurality of differentially connected delay elements. The ring oscillator responds to a control current signal for controlling the frequency of oscillation. A voltage to current converter converts the input tuning voltage to an output current for the controlling of the ring oscillator. The delay element consists of two source coupled P-channel transistors connected to a current source. The drains of the P-channel transistors are each connected to a voltage controlled impedance that changes the delay characteristics of the delay element in response to the input tuning voltage. A voltage reference generator provides the reference voltage necessary to determine the amplitude out of the delay element and is insensitive to variations due to manufacturing process, power supply, and operating temperature. A fully differential comparator provides symmetrical loading for the ring oscillator and the high gain necessary to provide the output drive capability.

Embedded voltage controlled oscillator with minimum sensitivity to

A system to transfer a serial digital data protocol between a controlling processor such as digital signal processor and a plurality of analog front-end devices is described. The system has a serial clock unit to generate a serial clock reference signal, a serial data control unit to create the serial data protocol, a serial clock transmission medium, a serial data transmission medium, and an analog front-end control unit. The serial digital data protocol has a start bit time, an address time, a read/write bit time, a first high impedance time, a serial data word time, a second high impedance time, and a stop bit time. A serial data word may be transferred either from the controlling processor to the analog front-end device or from the analog front-end device to the controlling processor dependent on the state at the read write bit time.

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Singapore, Singapore

Jie Liang