Sigrity, Inc.

Cadence Design Systems, Inc.

Afficient Academy, Inc.

Jiayuan Fang

Jian Liu

Jing Wang

Xiao Lin

Anyu Kuo

Guoxin Fan

Kezhou Li

Kaiyu Mao

Methods, systems, and computer-readable media for reference impedance adaptation are disclosed. The method may comprise a step of providing a network model of a circuit having at least one port, wherein the network model includes at least one network parameter, the network parameter being associated with the port and being defined based on a reference impedance of the port. The method may further comprise computing an input impedance of the port based on the network parameter. The method may also include defining a new reference impedance for the port based on the input impedance. Moreover, the method may include calculating a new network parameter of the network model based on the new reference impedance.

Methods, systems, and computer-readable media for reference impedance adaptation in electromagnetic simulation and modeling

A method for assessing a user's progress in learning a plurality of skills is disclosed. The method may include assigning a weighing factor to each of the plurality of skills. For each skill, the method may include providing a plurality of problems to the user, receiving answers to the plurality of problems from the user, and determining an accuracy rate associated with that skill based on the answers. The method may also include determining a probability of obtaining a score equal to or above a predetermined score by the user based on the weighting factors assigned to the plurality of skills and the accuracy rates associated with the plurality of skills.

System and method for assessing learning or training progress

Methods, systems, and computer readable media are disclosed for simulating a circuit. The method may comprise a step of providing a network model of the circuit having a plurality of ports, the plurality of ports being associated with one or more net pairs. The method may also comprise combining the plurality of ports into one or more groups based on the net pairs, each group corresponding to a net pair. In addition, the method may comprise calculating, for each group, one or more expansion elements, wherein the one or more expansion elements are associated with a shared property among all ports of the group. Moreover, the method may comprise simulating the circuit using a combination of the expansion elements calculated for each group.

Methods, systems, and computer-readable media for model order reduction in electromagnetic simulation and modeling

Methods, systems, and computer-readable media for simulating an electronic packaging structure are disclosed. The methods include providing an electromagnetic simulation framework for simulating the electronic packaging structure that includes at least two planes and an interconnect transitional component. The framework includes solvers for simulation based on parallel-plate, strip line, and microstrip line modes. The method also includes defining ports of the component based on modes, computing a network function characterizing the properties of the component; and associating ports with solvers of the framework.

Methods, systems, and computer-readable media for simulating interconnects in electronic packaging structures

A computer-implemented method for calculating a time-domain impulse response with improved causality based on a first spectrum in a frequency domain is disclosed. The first spectrum may be band-limited. The method may calculate a first time-domain impulse response from the first spectrum. The method may remove a non-causal portion of the first system time-domain impulse response to obtain a second time-domain impulse response, and calculate a second spectrum of the second time-domain impulse response. The method may further modify the second spectrum by adding a causal signal such that a difference between the second spectrum and the first spectrum is reduced. The method may also calculate the time-domain impulse response with improved causality from the modified second spectrum.

Method for calculating causal impulse response from a band-limited spectrum

Method, system, and computer readable medium are disclosed for analyzing electrical properties of a circuit. The method may comprise: providing a network model including at least one network parameter, the network parameter being defined over a frequency range; converting the network parameter into an intermediate network parameter having first and second portions; identifying first and second frequencies defining a frequency sub-range; replacing the first portion of the intermediate network parameter with a DC value when a frequency associated with the intermediate network parameter is lower than the first frequency; replacing the first portion of the intermediate network parameter with a transitional value when the frequency associated with the intermediate network parameter is within the frequency sub-range; and converting the intermediate network parameter with the replaced first portion into an updated network parameter.

Methods, systems, and computer-readable media for improving accuracy of network parameter in electromagnetic simulation and modeling

The present invention is a multi-level printed circuit board (PCB) containing at least one power plane for conducting and distributing electrical power and at least one ground plane, spaced apart from the power plane, for providing and distributing an electrical ground. At least one integrated circuit chip is mounted on the printed circuit board. At least one signal plane is spaced apart from both the power plane and the ground plane, for conducting and distributing electrical signals from a first point to a second point. The signal plane(s) each have a portion or 'patch' that is electrically isolated from signal traces in the remainder of the signal plane. The patches are placed in the area underneath the integrated circuit chip. The patches are connected, respectively, to the power plane or to the ground plane, for reducing effective inductance and input impedance. The multi-level PCB has one or more plated through hole vias for connecting the power or ground plane to a patch. Decoupling capacitors may be provided between the sets of plated through hole vias to further reduce input impedance.

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Saratoga, CA, United States of America

Jiayuan Fang