Dell Products Inc.

Jiayi He

Bhyrav M Mutnury

Arun Reddy Chada

Jaydev M Reddy

A serial data channel includes a transmitter that encodes serial data using a quaternary PAM-4 scheme, wherein the four PAM-4 signal levels include two balanced pairs of differential signal levels. The channel includes a de-emphasis circuit that determines that first and second symbols are in a first PAM-4 state, that a third symbol is in a second PAM-4 state, and provides a first de-emphasis to a voltage level of the second symbol in response to determining that the third symbol is represented as the second state. The de-emphasis circuit further determines that fourth and fifth symbols are in the second state, that a sixth symbol is in the first state, and provides a second de-emphasis to a voltage level of the fifth symbol in response to determining that the sixth symbol is represented as the first state. The first de-emphasis and the second de-emphasis represent different de-emphasis levels.

System and method for PAM-4 transmitter bit equalization for improved channel performance beyond 32 Gbps

A method includes receiving a serial data stream at a transmitter of a serial channel, encoding the serial data stream using a quaternary pulse amplitude modulation (PAM-4) scheme into a stream of 2-bit symbols, wherein a particular symbol is represented as a signal at one of four signal levels provided for a unit interval of time, determining that a first symbol of the encoded serial data stream is represented as a highest state of the PAM-4 scheme, and, in response, providing a first output signal on an output of the transmitter, wherein the first output signal includes a first portion at a first voltage level associated with the highest state for a first half of a first unit interval of time associated with the first symbol, followed by a second portion at a second voltage level associated with a de-emphasized highest state of the PAM-4 scheme for a second half of the first unit interval of time.

System and method for PAM-4 transmitter bit equalization for improved channel performance

A serial data channel includes a transmitter that encodes data using a PAM-4 where each symbol is represented by one of four signal levels comprising two balanced pairs of differential signal levels, and a de-emphasis circuit. The circuit determines that a symbol represents as a first instance of a first signal state, determines that a next symbol represents a second instance of the first state, and determines that a third symbol is represented as a second state. The circuit determines that the second state is of a same balanced pair as the first state and, in response, provides a de-emphasis to the second symbol. The circuit determines that the second state is of a different balanced pair as the first state and, in response, provides the de-emphasis and a correction factor to the second symbol.

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Round Rock, TX, United States of America

Jiayi He