Sandisk Technologies Inc.

Jiawei Xu

Hiroki Yabe

Anirudh Amarnath

Zhuo Li

To increase performance, a non-volatile storage apparatus reduces the amount of time needed for program verify by eliminating a pause in the raising of word line voltages that has been used to allow the channels of memory cells to discharge. To compensate for the removal of the time previously used to allow the channels of memory cells to discharge without experiencing a disturb, a source line that is in communication with the channels is lowered from a source voltage applied to support programming to a source voltage applied to support sensing (for program verify) earlier than in previous designs such that the source line reaches the source voltage applied to support sensing (for program verify) prior to applying the verify reference voltage to the selected word line for program verify.

Non-volatile memory with early ramp for improved performance

Memory cell sensing by charge sharing between two sense nodes is disclosed. A first sense node and a second sense node are pre-charged and the second node is discharged initiating charge sharing between the first sense node and the second sense node that results in an improved sense margin. Sensing circuitry disclosed herein may include one or more pre-charge circuits, sense enable circuits, and charge-sharing circuits. The increased sense margin achieved by sensing circuitry disclosed herein provides better noise immunity and more accurate sensing results.

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San Jose, CA, United States of America

Jiawei Xu