Texas Instruments Corporation

Jiao Jia

Manoj K Jain

Yunlong Liu

He Lin

Zhipeng Feng

A trench capacitor includes a plurality of trenches in a semiconductor substrate. A first polysilicon layer is located within the plurality of trenches and over a top surface of the substrate. The first polysilicon layer is continuous between the plurality of trenches. The trench capacitor further includes a plurality of second polysilicon layers. Each of the second polysilicon layers fills a corresponding trench of the plurality of trenches. The second polysilicon layers each extend to a top surface of the first polysilicon layer.

Trench capacitor with warpage reduction

A trench capacitor includes at least one epitaxial semiconductor surface layer on a semiconductor substrate having a doping level that is less than a doping level of the semiconductor substrate. A plurality of trenches are formed through at least one half of a thickness of the epitaxial semiconductor surface layer. The epitaxial semiconductor surface layer is thicker than a depth of the plurality of trenches. At least one capacitor dielectric layer lines a surface of the trenches. At least one trench fill layer on the dielectric layer fills the trenches.

Integrated trench capacitor formed in an epitaxial layer

A trench capacitor includes a plurality of trenches in a doped semiconductor surface layer of a substrate. At least one dielectric layer lines a surface of the plurality of trenches. A second polysilicon layer that is doped is on a first polysilicon layer that is on the dielectric layer which fills the plurality of trenches. The second polysilicon layer has a higher doping level as compared to the first polysilicon layer.

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Chengdu, China

Jiao Jia