Maxlinear, Inc.

Jianyu Zhu

Gaurav Chandra

Shantha Murthy Prem Swaroop

Tao Zeng

Eric Fogleman

Rahul Bhatia

Pawan Tiwari

Rodney Chandler

Sheng-Yu Peng

A digital-to-analog converter (DAC) controller system may be configured for controlling switching in an associated digital-to-analog converter (DAC), based on a plurality of system inputs that include at least a first system input corresponding to an input applied to the DAC for controlling switching therein, and a second system input that includes a reference control signal. The DAC controller system may include a logic gate circuit that generates a gate output based on two gate inputs that include the first system input and an input set based on the second system input; and a plurality of timing circuits that generate timing outputs for controlling timing of switching in the DAC, which include at least one timing circuit that generates a timing output based on the gate output, with the timing output configured for application in conjunction with and for adjusting a timing output of another timing circuit.

Digital-to-analog converter (DAC) with partial constant switching

Systems and methods are provided for digital-to-analog conversions with adaptive digital offsets. A digital offset may be determined and applied to a digital input to a digital-to-analog converter (DAC), and digital-to-analog conversions are then applied via the DAC to the digital input with the digital offset. The digital offset may be set to account for one or more conditions relating to inputs to the DAC, with the one or more conditions affecting switching characteristics of one or more of a plurality of conversion elements in the DAC. The digital offset may be determined dynamically and adaptively, such as based on the input and/or conditions relating to the input. The adjustments may be selectively applied to the digital offset for particular input conditions.

Digital-to-analog converter (DAC) with digital offsets

Methods and systems are provided for dynamic power switching in current-steering digital-to-analog converters (DACs). A DAC circuit may be configured to apply digital-to-analog conversions based on current steering, and to particularly incorporate use of dynamic power switching during conversions. The DAC circuit may comprise a main section, which may connect a main supply voltage to a main current source. The main section may comprise a positive-side branch and a negative-side branch, which may be configured to steer positive-side and negative-side currents, such as in a differential manner, to effectuate the conversions. The dynamic power switching may be applied, for example, via a secondary section connecting a main current source in the DAC circuit to a secondary supply voltage. The secondary supply voltage may be configured such that it may be less than the main supply voltage used in driving the current steering in the DAC circuit.

Dynamic power switching in current-steering DACS

A digital-to-analog converter (DAC) may have an encoder that generates a multi-bit output based on a multi-bit input, a plurality of first converter elements, with each first converter element generating an output according to a single bit of the multi-bit output of the encoder; and a combiner that generates a combined output based on combining outputs from the plurality of first converter elements. The number of bits in the multi-bit input being two or more and the number of bits in the multi-bit output being greater than the number of bits in the multi-bit input. The DAC may also have one or more second converter elements, with second converter element generating an output according to a single bit, and the combiner may generates the combined output based on combining outputs from the plurality of first converter elements with outputs from the one or more second converter elements.

Localized dynamic element matching and dynamic noise scaling in digital-to-analog converters (DACs)

Dynamic power switching in current-steering DACs

Systems and methods are provided for adaptive configuration and control of digital-to-analog converters (DACs). Performance of a plurality of conversion elements in a digital-to-analog converter (DAC) may be assessed based on particular input conditions associated with a digital input to the DAC, and the DAC may be configured based on the assessing of performance. Each conversion element of the plurality of conversion elements handles a particular bit in the digital input. The configuring may comprise selecting a subset of the plurality of conversion elements, and setting only the subset of the plurality of conversion elements to apply a particular type of operations. The particular type of operations pertains to applying digital-to-analog conversions via the DAC, and the particular type of operations relates to or affects performance. The particular input conditions may comprise signal backoff.

A radio frequency (RF) receiver may comprise a first sampling module that is operable to sample in a first level at a particular main sampling rate; a plurality of second-level sampling modules, wherein each of the plurality of second-level sampling modules is operable to sample in a second level, an output of the first level, at a second sampling rate that is reduced compared to the main sampling rate; and a plurality of third-level modules, each comprising a plurality of third-stage sampling sub-modules that are operable to sample at a third sampling rate that is reduced compared to the second sampling rate, and a plurality of corresponding analog-to-digital conversion (ADC) sub-modules.

Multi-layer time-interleaved analog-to-digital convertor (ADC)

Systems and methods are provided for digital-to-analog converter (DAC) with partial constant switching. A digital-to-analog converter (DAC) comprising a plurality of conversion elements may be configured to apply constant switching in only some of the conversion elements. Only conversion elements applying constant switching may incorporate circuitry for providing such the constant switching. Alternatively, each conversion element may incorporate constant switching circuitry and functionality, and the constant switching may then be turned on or off for each conversion element adaptively, such as based on input conditions.

Methods and systems are provided for enhanced digital-to-analog conversions. A segmentation-based digital-to-analog converter (DAC) may be configured for applying digital-to-analog conversions to N-bit inputs. The segmentation-based DAC may comprise a plurality of DAC elements, with each DAC element being operable to apply digital-to-analog conversion based on a single bit, and an encoder operable to generate an x-bit output. The number of DAC elements may be different than number of bits (N) in inputs to the DAC. One or more bits of the N-bit input may be applied to the encoder to generate the x-bit output, with each bit in the x-bit output being applied to a corresponding one of the plurality of DAC elements. Remaining one or more bits of the N-bit input, if any, may be applied directly to a corresponding one or more of the plurality of DAC elements.

Systems and methods are provided for digital-to-analog converter (DAC) with digital offsets. A digital offset may be applied to an input of a digital-to-analog converter (DAC), and digital-to-analog conversions are then applied via the DAC to the input with the digital offset. The digital offset is set to account for one or more conditions relating to inputs to the DAC, with the one or more conditions affect switching characteristics of one or more of a plurality of conversion elements in the DAC, and where each conversion element handles a particular bit in inputs to the DAC. The digital offset may be determined dynamically and adaptively, such as based on the input and/or conditions relating to the input. Alternatively, the digital offset may be pre-determined and fixed. One or more adjustments may be selectively applied to the digital offset for particular input conditions.

A signal receiver may comprise circuitry for applying multi-level sampling to an input signal, using a plurality of sampling rates that comprises at least two different sampling rates, and circuitry for processing one or more outputs of the multi-level sampling. The processing may comprises sampling at a sampling rate that is different than each of the plurality of sampling rates used during the multi-level sampling and applying analog-to-digital conversion. At least one of the sampling rates used during the multi-level sampling and/or the sampling rate used during the processing may be set based on configuring of one or more clock signals used during the multi-level sampling and/or during the processing. At least one of the one or more clock signals may be configured based on reduction of frequency of a corresponding base clock signal.

Signal receiver with multi-level sampling

Methods and systems are provided for controlling operations of digital-to-analog converters (DACs), particularly ones comprising multiple DAC elements. In particular, a plurality of DAC elements in a digital-to-analog converter (DAC) may be controlled during digital-to-analog conversions, with the controlling comprising use of a switching arrangement that comprises one or more switching elements configured for controlling switching of each of the plurality of DAC elements. The controlling may comprise forcing one or more of the plurality of DAC elements in the DAC to not switch during the digital-to-analog conversions. Further, the remaining DAC elements may be scrambled. The controlling of the plurality of DAC elements in the DAC may be based on analysis of an input to the DAC that is being converted. The analysis may comprise determining when the input is backed off from full-scale. A switching sequence may be applied, via each of the one or more switching elements.

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San Diego, CA, United States of America

Jianyu Zhu