Yangtze Memory Technologies Co., Ltd.

Jianyu Xiang

Xueqing Huang

Jing Wei

Jinlong Zhang

Junyao Zhu

Yuankang Yang

Qingqi Li

Example memory devices, systems, and methods for reducing erase disturb in memory devices are disclosed. One example method includes erasing, during an erase operation of a block in a memory cell array, one or more memory cells in the block. It is verified, during the erase operation of the block, whether the one or more memory cells are erased. Each of one or more blocks in the memory cell array is respectively read during the erase operation of the block, where respectively reading each of the one or more blocks includes applying a first voltage to a first select gate line coupled to a first select gate transistor in the block, and applying a second voltage to a second select gate line coupled to a second select gate transistor in one of the one or more blocks, where the first voltage is lower than the second voltage.

Growing community of inventors

Wuhan, China

Jianyu Xiang