Boe Technology Group Co., Ltd.

Beijing Boe Optoelectronics Technology Co., Ltd.

Beijing Boe Display Technology Co., Ltd.

Ordos Yuansheng Optoelectronics Co., Ltd.

Wuhan Boe Optoelectronics Technology Co., Ltd.

Hefei Boe Display Technology Co., Ltd.

Chongqing Boe Optoelectronics Technology Co., Ltd.

Beijing Boe Technology Development Co., Ltd.

State Grid Shandong Electric Power Research Institute

State Grid Corporation of China

China Electric Power Research Institute Company Limited

Technology Group Co., Ltd.

State Grid Shandong Electric Power Company

Jeijing Boe Optoelectronics Technology Co., Ltd.

Jiantao Liu

Jiuxia Yang

Feng Bai

Yanping Liao

Dongchuan Chen

Xue Dong

Xiaochuan Chen

Haisheng Wang

Yingmeng Miao

Xibin Shao

Zhihua Sun

Yingming Liu

Shengji Yang

Jingbo Xu

Qiujie Su

Peng Liu

Seungmin Lee

Lei Wang

Changfeng Li

Rui Li Xu

Peng Hui Jiang

Fengli Ji

Jingyi Xu

Shanshan Bai

Xiaoliang Ding

Minghua Xuan

Wei Sun

Weijie Zhao

Xin Duan

Yuanhui Guo

Xiaoxiao Chen

Yingzi Wang

Hongliang Yuan

Jian Qiao Sun

Jianbo Xian

Hongjuan Liu

Bo Li

Tao Yang

Li Tian

Jing Su

Hong Liu

Xiaofeng Yin

Xiaoyuan Wang

Jian Wang

Wei Li

Jian Zhang

Pengcheng Lu

Ming Yang

Wenbo Li

Qian Wang

Qi Liu

Jing Liu

Lei Guo

Zhen Wang

Yang Hu

Rui Liu

Jinghua Miao

Han Zhang

Yongzhi Song

Ting Dong

Wei Yan

Kaixuan Wang

Yu Zhang

Wei Liu

Jing Wang

Gang Wang

Tao Wang

Hui Wang

Xi Chen

Feng Li

Liang Chen

Hailin Xue

Ke Fei Wang

Ke Dai

Haiwei Sun

Xiaolong Li

Shijun Wang

Kuanjun Peng

Jian Nan Guo

Yu Ma

Tiankuo Shi

Lianjie Qu

Shuo Zhang

Zheng Zhang

Jun Fan

Shuo Wang

Minglei Chu

Yan Sun

Zhenhua Lv

Yang Wang

Yu Feng

Dong Hui Liu

Lin Lin

Huibin Guo

Jian Zhao

Wenchao Han

Qi Zheng

Zhaohui Meng

Yanfeng Wang

Yinan Liang

A display apparatus includes sub-pixels, at least one gate line group and a scan drive circuit. The gate line group includes a first gate line, a second gate line and a third gate line. The scan drive circuit outputs, in a frame scan cycle, a first scan signal to the first gate line, a second scan signal to the second gate line, and a third scan signal to the third gate line in sequence. Durations of effective scan periods of the scan signals are equal. A start moment of the effective scan period of the second scan signal is delayed by a first time length compared with that of the first scan signal. A start moment of the effective scan period of the third scan signal is delayed by a second time length less than the first time length compared with that of the second scan signal.

Display apparatus and driving method therefor

The present disclosure relates to a signal selector and a driving method therefor, a display panel, and a display device. The signal selector loads a writing signal into a control end of a switching circuit during a data writing time period, and the switching circuit is connected in response to the writing signal loaded on the control end of the switching circuit, so that the writing signal is loaded to a far end of an output signal line. During a pull up period after the data writing period, a boost control signal is loaded to the control end of a boost circuit, and the boost circuit pulls up the voltage of an output end of the switching circuit in response to the boost control signal loaded on a second end of the boost circuit.

Signal selector and driving method therefor, display panel, and display apparatus

A distributed photovoltaic regulation method considering safety verification includes acquiring power transmission or power substation equipment limit value, load condition, and distributed photovoltaic aggregation information under equipment, calculating load rate of equipment, calculating total maximum regulation amount or the total over-limit correction amount of distributed photovoltaic power under equipment based on the load rate of equipment and a threshold value, and decomposing total maximum regulation amount or total over-limit correction amount to obtain respective total maximum regulation amount or total over-limit correction amount of each load point; and decomposing respective total maximum regulation amount or total over-limit correction amount of each load point to obtain respective maximum regulation amount or over-limit correction amount of each automatic power generation control unit, correcting respective regulation requirement and generating respective regulation target of each automatic power generation control unit, and sending respective regulation target to each automatic power generation control unit for execution.

Distributed photovoltaic regulation method and system considering safety verification

A multi-viewpoint image processing system includes a processing apparatus and a display apparatus, the processing apparatus includes an acquisition module and an encoding module, wherein the acquisition module is configured to acquire K viewpoint images, and a viewpoint image includes M rows and N columns of pixels; the encoding module is configured to receive the K viewpoint images, encode the K viewpoint images to generate a plurality of encoded images, and send the plurality of encoded images to the display apparatus; the display apparatus is configured to receive the plurality of encoded images and obtain M pieces of display information according to the plurality of encoded images, an i-th piece of display information including i-th rows of pixels of the K viewpoint images, i=1, 2, . . . , M; and perform stereoscopic display according to the M pieces of display information.

Multi-viewpoint image processing system and method thereof

A display panel, comprising open areas; a non-open area; an array substrate comprising a first substrate and gate lines, data lines, thin film transistors and raised portions located in the non-open area, wherein orthographic projections of the data lines on the first substrate have overlaps with orthographic projections of the gate lines on the first substrate, orthographic projections of the raised portions on the first substrate are located within the orthographic projections of the gate lines on the first substrate; and a color filter substrate comprising a second substrate and spacers located on a side of the second substrate; wherein orthographic projections of the spacers on the first substrate have overlaps with the orthographic projections of the raised portions and overlapping parts of the data lines and the gate lines on the first substrate.

Display panel and display device

A pixel electrode, an array substrate, and a display device are provided. The pixel electrode includes: a first edge conductive part and a second edge conductive part arranged at intervals in a first direction, and a main conductive part at least partially located between the first edge conductive part and the second edge conductive part. The main conductive part is respectively connected to the first edge conductive part and the second edge conductive part. The main conductive part includes at least one first group of sub-conductive parts and at least one second group of sub-conductive parts. The first group of sub-conductive parts and the second group of sub-conductive parts are arranged alternately in the first direction.

Pixel electrode, array substrate and display device

A display driving method and a display device are provided. The display driving method includes: scanning a plurality of subpixels arranged in an NΔM array row by row or in multiple rows to turn on each row of scanned subpixels, so that the duration when two adjacent rows of subpixels are simultaneously in a turn-on state is greater than or equal to two times a unit scan time, the unit scan time being the time required for scanning one row of subpixels, and N and M both being integers greater than 1; and applying data signals to at least two rows of subpixels that are simultaneously in the turn-on state, so that the duration when data signals are applied to at least some rows of subpixels is greater than the unit scan time.

Display driving method for increasing charging duration and display device

The present disclosure relates to a touch display device and a driving method for the touch display device. The touch display device comprises data lines, gate lines, pixel electrodes located within display areas defined by the data lines and the gate lines, and a driving circuit. The driving circuit is configured to provide a first display data signal to the data lines during a display stage of the touch display device, and is configured to provide a second display data signal to the data lines during a predetermined period adjacent to the display stage within a touch stage of the touch display device, and provide an off-signal to the gate lines during the predetermined period such that the second display data signal is not provided to the pixel electrodes.

Touch display device and driving method for the touch display device

The present disclosure provides a full-reflection display substrate, a manufacturing method thereof and a full-reflection display device. The full-reflection display substrate includes: a base substrate, the base substrate including a display region and a non-display region; a signal line arranged in the display region; a bonding pin arranged in the non-display region, coupled to the signal line and bonded to a driving circuitry; a reflection layer arranged in the display region; and an etch stop pattern arranged at a same layer and made of a same material as the reflection layer, arranged in the non-display region, and at least covering a side surface of the bonding pin.

Full-reflection display substrate, manufacturing method thereof and full-reflection display device

The present disclosure provides a display panel and a manufacturing method therefor, and a display apparatus, which relate to the technical field of displaying. The display panel includes a first base plate and a second base plate which are aligned with each other; the first base plate includes a first substrate and a thin film transistor; the thin film transistor includes an active layer; an optical adjustment layer is disposed on the second base plate; an orthographic projection of the optical adjustment layer on the first substrate overlaps with an orthographic projection of the active layer on the first substrate. That is, the optical adjustment layer corresponds to the active layer. In a laminating direction of the display panel, the existence of the optical adjustment layer with a certain height enables a reflecting surface of the second base plate to be closer to the first base plate.

Display panel and manufacturing method therefor, and display apparatus

A display panel, including: a substrate including a display region and a non-display region; a second conductive layer including more than one gate line located in the display region, and more than one virtual gate line located in the non-display region; a virtual conductive part, located in the non-display region, where the virtual conductive part is located in a different conductive layer from the virtual gate line, an orthographic projection of the virtual conductive part on the substrate is located within an orthographic projection of the virtual gate line on the substrate, and the virtual conductive part is configured to form an equivalent capacitance with the virtual gate line; and a RC load of the virtual gate line matches with a RC load of the gate line.

Display panel and display device with non-display area gate lines to match display area gate lines RC load

A driving method for a display panel and a display apparatus. The driving method includes: acquiring display data of a to-be-displayed image in a current display frame (S); and loading a data voltage on a data line in the display panel according to the display data, such that each sub-pixel in the display panel is charged with the corresponding data voltage (S).

Display panel having different voltage conversion edge for positive and negative data voltages and driving method thereof

An electrode structure, a display panel, an electronic device are provided, the electrode structure includes a first electrode portion, a second electrode portion and a conductive connection portion, the first electrode portion includes a first connection bar having a first side and a second side and a plurality of first electrode strips, ends of adjacent first electrode strips away from the first connection bar are open; the second electrode portion includes a second connection bar at a position of the first side away from the second side and a plurality of second electrode strips, the second connection bar includes a third side and a fourth side; the second electrode strips are connected with the second connection bar, ends of adjacent second electrode strips away from the second connection bar are open; ends of the conductive connection portion are connected with the first connection bar and the second connection bar.

Electrode structure, display panel, and electronic device

The present disclosure provides an array substrate, a method for manufacturing the array substrate, and a display apparatus. The array substrate includes: a base substrate, a thin film transistor disposed on the base substrate; a first passivation layer, an organic film layer and a pixel electrode disposed on the thin film transistor; a connection structure for connecting the source electrode of the thin film transistor and the pixel electrode, wherein the connection structure is disposed in a via hole structure exposing the pixel electrode and the source electrode; or, the connection structure is disposed between the pixel electrode and the source electrode.

Array substrate and display apparatus comprising connection structure between pixel electrode and source electrode

A display panel and a display device are provided. The display panel includes: an array substrate, a cell-assembling substrate, and a liquid crystal layer located therebetween. The array substrate includes a first base, and the first base comprises sub-pixel regions (A), a first trace region (B) located between two adjacent rows of sub-pixel regions (A), and a second trace region (C) located between two adjacent columns of sub-pixel regions (A). Gate lines () are located in the first trace region (B). Data lines () are located in the second trace region (C), each data line () has a support portion (), and the support portion () is located in an intersection region of the first trace region (B) and the second trace region (C). Sub-pixel units are located in the sub-pixel region (A), and the sub-pixel units includes a common electrode ().

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Beijing, China

Jiantao Liu