Hewlett-packard Development Company, L.p.

Hewlett Packard Enterprise Development LP

Jianhua Yang

Richard Stanley Williams

Ning Ge

Gilberto Medeiros Ribeiro

John Paul Strachan

Minxian Max Zhang

Zhiyong Li

Matthew D Pickett

Miao Hu

Alexandre M Bratkovski

Wei Yi

Shih-Yuan Wang

Wei Guang Wu

Feng Miao

Qiangfei Xia

Philip John Kuekes

Janice H Nickel

William M Tong

Julien Borghetti

Kyung Min Kim

Warren Bruce Jackson

Gary A Gibson

Duncan R Stewart

Hans S Cho

Michael Josef Stuke

Dmitri Borisovich Strukov

Yoocharn Jeon

Nathaniel Quitoriano

Douglas Ohlberg

Katy Samuels

Byungjoon Choi

David A Fattal

Frederick A Perner

Marco Fiorentino

Sagi Varghese Mathai

Perry Victor Lea

Adam L Ghozeil

Brent Buchanan

Richard H Henze

Jingjing Li

Xia Sheng

Shih-Yuan (sy) Wang

Glen Eric Montgomery

Muhammad Shakeel Qureshi

Shih Yuan Wang

Byung-Joon Choi

Gilberto Medeiros Riberio

Max Zhang

Xuema Li

A device according to examples of the present disclosure includes a crossbar array including a cell. The cell includes a first resistance switch and a second resistance switch connected in series with the first resistance switch. The first and second resistance switches have different switching characteristics. One of the first and second resistance switches may act as a switch, while the other of the first and second resistance switches may weight the switching behavior of the one that acts as the switch.

Device with multiple resistance switches with different switching characteristics

A double bias dot-product engine for vector processing is described. The dot product engine includes a crossbar array having N&#xd7;M memory elements to store information corresponding to values contained in an N&#xd7;M matrix, each memory element being a memristive storage device. First and second vector input registers including N voltage inputs, each voltage input corresponding to a value contained in a vector having N&#xd7;1 values. The vector input registers are connected to the crossbar array to supply voltage inputs to each of N row electrodes at two locations along the electrode. A vector output register is also included to receive voltage outputs from each of M column electrodes.

Double bias memristive dot product engine for vector processing

A method of obtaining a dot product includes applying a programming signal to a number of capacitive memory devices coupled at a number of junctions formed between a number of row lines and a number of column lines. The programming signal defines a number of values within a matrix. The method further includes applying a vector signal. The vector signal defines a number of vector values to be applied to the capacitive memory devices.

Memcapacitive cross-bar array for determining a dot product

A memristive dot-product system for vector processing is described. The memristive dot-product system includes a crossbar array having a number of memory elements. Each memory element includes a memristor. Each memory element includes a transistor. The system also includes a vector input register. The system also includes a vector output register.

Memristive dot product engine for vector processing

A temperature compensation circuit may comprise a temperature sensor to sense a temperature signal of a memristor crossbar array, a signal converter to convert the temperature signal to an electrical control signal, and a voltage compensation circuit to determine a compensation voltage based on the electrical control signal and pre-calibrated temperature data of the memristor crossbar array.

Temperature compensation circuits

Provided in one example is a nonvolatile memory cross-bar array. The array includes: a number of junctions formed by a number of row lines intersecting a number of column lines; a first set of controls at a first set of the junctions coupling between a first set of the row lines and a first set of the column lines; a second set of controls at a second set of the junctions coupling between a second set of the row lines and a second set of the column lines; and a current collection line to collect currents from the controls of the first set and the second set through their respective column lines and output a result current corresponding to a sum of a first dot product and a second dot product.

Nonvolatile memory cross-bar array

An integrated circuit may include a substrate with a plurality of transistors formed in the substrate. The plurality of transistors may be coupled to a first metal layer formed over the plurality of transistors. A plurality of high dielectric nanometer capacitors may be formed of memristor switch material between the first metal layer and a second metal layer formed over the plurality of high dielectric capacitors. The plurality of high dielectric capacitors may operate as memory storage cells in dynamic logic.

Dynamic logic memcap

Protective elements are provided for non-volatile memory cells in crossbar arrays in which each memristor is situated at a crosspoint of the array. Each memristor is provided with a protective element. The protective element includes a layer of a first oxide that upon heating converts to a second oxide having a higher resistivity than the first oxide.

Protective elements for non-volatile memory cells in crossbar arrays

A resistive memory device includes a first electrode, a memristor coupled in electrical series with the first electrode, a second electrode coupled in electrical series with the memristor, a selector coupled in electrical series with the second electrode, and a third electrode coupled in electrical series with the selector. The memristor includes oxygen or nitrogen elements. The selector includes a composite dielectric material of a first dielectric material, a second dielectric material that is different from the first dielectric material, and a dopant material including a cation having a migration rate faster than the oxygen or the nitrogen elements of the memristor. The first dielectric material and the second dielectric material are present in a ratio ranging from 1:9 to 9:1, and a concentration of the dopant material in the composite dielectric material ranges from about 1% up to 50%.

Resistive memory devices and arrays

In some examples, an integrated circuit device includes a substrate, a memristor over the substrate and comprising a first metal layer as a first electrode, a second metal layer as a second electrode, and a switching oxide layer between the first and second metal layers, and a thermal resistor layer over the substrate.

Integrated circuit devices comprising memristors

A negative differential resistance (NDR) device for non-volatile memory cells in crossbar arrays is provided. Each non-volatile memory cell is situated at a crosspoint of the array. Each non-volatile memory cell comprises a switching layer in series with an NDR material containing fast diffusive atoms that are electrochemically inactive. The switching layer is positioned between two elec-trodes.

Negative differential resistance (NDR) device based on fast diffusive metal atoms

Growing community of inventors

Palo Alto, CA, United States of America

Jianhua Yang