Boe Technology Group Co., Ltd.

Beijing Boe Display Technology Co., Ltd.

Jianhua Huang

Yingying Qu

Yifu Chen

Zhihua Sun

Ting Dong

Lingdan Bo

Feng Qu

Jiantao Liu

Dongchuan Chen

Chongyang Zhao

Yanping Liao

Yingmeng Miao

Qiujie Su

Yue Yang

Senwang Li

Yu Zhang

Jian Li

Hui Zhang

Zheng Zhang

Seungmin Lee

Shulin Yao

Guohuo Su

Wenpeng Ma

Xiaochun Xu

Pengfei Hu

Shuming Wang

Yinshu Zhang

Zhiyu Lv

Provides are a drive method of a display panel and a display apparatus. The drive method of the display panel includes: obtaining a current temperature of the display panel; obtaining a current overdrive lookup table corresponding to the current temperature according to the current temperature and initial overdrive lookup tables corresponding to prestored set temperatures, wherein the initial overdrive lookup tables include a plurality of different first gray-scale values, a plurality of different second gray-scale values and initial gray-scale values corresponding to any first gray-scale value and any second gray-scale value, and the current overdrive lookup table includes a plurality of different first gray-scale values, a plurality of different second gray-scale values and current gray-scale values corresponding to any first gray-scale value and any second gray-scale value; and driving sub-pixels in the display panel to charge corresponding data voltages according to the current overdrive lookup table.

Drive method of display panel and display apparatus

A display panel, comprising open areas; a non-open area; an array substrate comprising a first substrate and gate lines, data lines, thin film transistors and raised portions located in the non-open area, wherein orthographic projections of the data lines on the first substrate have overlaps with orthographic projections of the gate lines on the first substrate, orthographic projections of the raised portions on the first substrate are located within the orthographic projections of the gate lines on the first substrate; and a color filter substrate comprising a second substrate and spacers located on a side of the second substrate; wherein orthographic projections of the spacers on the first substrate have overlaps with the orthographic projections of the raised portions and overlapping parts of the data lines and the gate lines on the first substrate.

Display panel and display device

The present disclosure provides a display panel and a manufacturing method therefor, and a display apparatus, which relate to the technical field of displaying. The display panel includes a first base plate and a second base plate which are aligned with each other; the first base plate includes a first substrate and a thin film transistor; the thin film transistor includes an active layer; an optical adjustment layer is disposed on the second base plate; an orthographic projection of the optical adjustment layer on the first substrate overlaps with an orthographic projection of the active layer on the first substrate. That is, the optical adjustment layer corresponds to the active layer. In a laminating direction of the display panel, the existence of the optical adjustment layer with a certain height enables a reflecting surface of the second base plate to be closer to the first base plate.

Display panel and manufacturing method therefor, and display apparatus

The present disclosure relates to an array substrate. At least one of a pixel electrode and a common electrode in the array substrate has an electrode structure. The electrode structure includes: first and second electrode portions, and a conductive connection portion. The first electrode portion includes a first connection bar and first electrode bars. The second electrode portion includes a second connection bar and second electrode bars. No common line is provided in each of the sub-pixel regions.

Electrode structure, display panel and display device

A display panel and a display device are provided. The display panel includes: an array substrate, a cell-assembling substrate, and a liquid crystal layer located therebetween. The array substrate includes a first base, and the first base comprises sub-pixel regions (A), a first trace region (B) located between two adjacent rows of sub-pixel regions (A), and a second trace region (C) located between two adjacent columns of sub-pixel regions (A). Gate lines () are located in the first trace region (B). Data lines () are located in the second trace region (C), each data line () has a support portion (), and the support portion () is located in an intersection region of the first trace region (B) and the second trace region (C). Sub-pixel units are located in the sub-pixel region (A), and the sub-pixel units includes a common electrode ().

The present disclosure relates to the field of display technology, and in particular, to an array substrate and a display apparatus. The array substrate has a display area and a peripheral wiring area provided at at least one side of the display area. The display area includes a thin film transistor and a common electrode formed on the base substrate; the peripheral wiring area includes a first lead, a gate signal line and a common signal line formed on the base substrate; the first lead and the gate electrode of the thin film transistor are arranged in an identical layer and are electrically connected; the gate signal line is located on a side of the first lead away from the base substrate, and is electrically connected to the first lead through a first transition structure.

Array substrate and display apparatus

Provided are a display panel and a display apparatus. The display panel comprises: a first substrate and a second substrate that are arranged opposite each other, wherein a display area and a frame area surrounding the display area are provided between the second substrate and the first substrate; a color resistance structure that is located in the frame area on the side of the second substrate facing the first substrate and surrounds the display area, wherein the color resistance structure comprises a first black matrix and a first color resistance portion arranged in a stacked manner; and a plurality of support bars that surround the display area, wherein each of the support bars fills a space between the color resistance structure and the first substrate.

Display panel comprising a plurality of support bars having ends that sequentially decrease in length in a direction from a frame area to a display area and display apparatus

The present disclosure relates to an electrode structure and a display panel. The electrode structure includes: first and second electrode portion and a conductive connection portion. The first electrode portion includes a first connection bar and first electrode bars. The first connection bar has a first side and a second side. The first electrode bars are located on the first side and connected to the first connection bar, and ends of adjacent first electrode bars away from the first connection bar are in an open shape. The second electrode portion includes a second connection bar and a second electrode bars. The second connection bar has a third side and a fourth side. The second electrode bars are located on the third side and connected to the second connection bar, and ends of adjacent second electrode bars away from the second connection bar are in an open shape.

An array substrate has a plurality of sub-pixel regions. The array substrate includes a base substrate, gate lines disposed on a side of the base substrate and extending in a first direction, pixel electrodes each disposed in a respective one of the sub-pixel regions, and common electrodes disposed on a side, facing away from the base substrate, of the pixel electrodes and the gate lines. An orthographic projection of at least one common electrode on the base substrate at least partially overlaps with an orthographic projection of at least one gate line adjacent to the at least one common electrode on the base substrate, or a border of an orthographic projection of at least one common electrode on the base substrate partially overlaps with a border of an orthographic projection of at least one gate line adjacent to the at least one common electrode on the base substrate.

Array substrate and display device

An array substrate, a light control panel, and a display device are disclosed. The array substrate includes a data line layer, a base substrate, a first electrode layer, and a second electrode layer. The first electrode layer includes gate lines, each gate line integrally extends along a first direction, and includes first broken line structures directly connected in sequence in the first direction; the data line layer includes data lines, each data line integrally extends along a second direction; the gate lines and the data lines cross each other to define light control pixel units; the second electrode layer includes common electrodes, each common electrode is provided in at least one light control pixel unit; and at least one gate line at least partially overlaps with an orthographic projection of at least one common electrode on the first electrode layer.

Array substrate, light control panel, and display device

The present disclosure relates to the technical field of display and discloses a polarizer, a display panel and a display device, where the polarizer includes two layers of protective films, as well as one layer of main polarizing film and at least one layer of auxiliary polarizing film between the two layers of protective films, and a set angular difference exists between an angle of a transmittance axis of the auxiliary polarizing film and an angle of a transmittance axis of the main polarizing film.

Polarizer, display panel and display device

The present disclosure relates to the field of display technology and, in particular, to a pixel charging method, a pixel charging circuit, a display device, and a display control method. The pixel charging method includes acquiring a state of a backlight source and adjusting a charging time of a sub-pixel corresponding to the backlight source according to the state of the backlight source. When the backlight source is in an on state, the charging time of the sub-pixel corresponding to the backlight source is a first charging time. When the backlight source is in an off state, the charging time of the sub-pixel corresponding to the backlight source is a second charging time, the second charging time being shorter than the first charging time.

Growing community of inventors

Beijing, China

Jianhua Huang