Espressif Systems (shanghai) Co., Ltd.

Avago Technologies General IP (singapore) Pte. Ltd.

Spreadtrum Communications (shanghai) Co., Ltd.

Jiangang Wu

Wen Qing Chen

Swee Ann Teo

Jiangjian Jiang

Han Liu

Peng Xu

Zhimin Dong

Jiaqing Wang

Nanshan Shu

Haifeng Shen

Yingyi Ju

A wireless transmission method and a transceiver for wireless transmission are disclosed. According to this method, information to be transmitted and transmission control information are encoded into packet length information of wireless frames for transmission, wherein the transmission control information is filled into synchronization packets, sequence number packets and data packets, and the information to be transmitted is only filled into the data packets. Specifically, the method includes sequentially polling data for transmission in units of transmission sequences, and longitudinally encoding the information to be transmitted and data check information into the data packets. The transmission sequences are separated and sorted by the synchronization packets and the sequence number packets, and the data packets are sorted by sequence number fields in the transmission sequence.

Method and device for wireless transmission

A converting circuit and a communication device are provided. The converting circuit includes: a sample hold circuit for receiving an analog signal; a Digital to Analog Converter (DAC); a comparator being connected with an output end of the sample hold circuit and an output end of the DAC; and a control circuit being connected with an output end of the comparator, wherein when the sample hold circuit receives an analog signal, the control circuit controls the sample hold circuit and the comparator to work, controls an output of the DAC based on an output of the comparator, and outputs a corresponding digital signal; and when the control circuit detects a digital signal is input, the control circuit controls the DAC to convert the digital signal into an corresponding analog signal and output the corresponding analog signal. The converting circuit can reduce chip area and chip cost.

Converting circuit with control circuit to detect signals input into the converting circuit, and communication device

An apparatus having a processor and an interface to a nonvolatile memory having a plurality of blocks is disclosed. The processor is configured to (i) monitor a number of reads since a respective erase in at least one of the blocks in the nonvolatile memory, (ii) move a page from a first block to a second block in response to the number of reads exceeding a first threshold where the first block is partially programmed and (iii) move the page from the first block to the second block in response to the number of reads exceeding a second threshold where the first block is fully programmed. The first threshold is less than the second threshold.

Read disturb handling in NAND flash

Growing community of inventors

Shanghai, China

Jiangang Wu