Software Site Applications, Limited Liability Company

Hewlett-packard Company

Other

Cisco Technology, Inc.

Exavio, Inc.

Jiangang Ding

Ji Zhang

Hain-Ching Liu

Wesley H Stelter

Kai Xu

Phillip Pham

Hain Ching Liu

Paul Grunewald

Kamran Mostafavi

The present invention provides a disk drive storage defragmentation system, comprising providing a cache buffer system coupled to a host system, coupling a disk drive storage system to the cache buffer system, performing a defragmentation process on the disk drive storage system utilizing the cache buffer system and servicing a data access request by the host system from the cache buffer system.

Disk drive storage defragmentation system

Systems and methods for deploying two-way data communication over a one-way infrastructure are disclosed. An end user enters a control command into an input device that is capable of sending data containing the control command over a network to a content service provider. The content service provider adjusts the end user's output stream in accordance with the end user's control command. The adjusted output stream is distributed to the output display device. Further features are disclosed such as providing content descriptive metadata to the input device and/or the output display device.

Deploying two-way interactive service over a one-way network

A data transport system for transporting data between a server () and a client receiver () over a network () includes a receiving proxy cache () coupled to a client receiver () via a reliable connection (), such as a cable connection. The majority of data is transported from the server () to the receiving proxy cache () over an efficient data transmission channel (). The receiving proxy cache () verifies the status of the data transmitted over the efficient channel (). If there is an error in the data transmission, a portion of the data associated with the error is retransmitted from the server () to the receiving proxy cache () over a reliable data transmission channel (). The complete data at the receiving proxy cache () is delivered to a client receiver () over a reliable connection ().

Method and system for reliably and efficiently transporting data over a network

The present invention provides a disk drive storage defragmentation system, comprising providing a cache buffer system coupled to a host system, coupling a disk drive storage system to the cache buffer system, performing a defragmantation process on the disk drive storage system utilizing the cache buffer system and servicing a data access request by the host system from the cache buffer system.

The present invention provides efficient methods for performing motion compensation. The methods are particularly useful during motion compensation based decoding and recoding. In one aspect, motion compensation in accordance with the present invention improves on-chip memory usage. This is done by creating and storing a reference window in the on-chip memory. The reference window is constructed such that the reference frame portions required for motion compensation of a current frame are contained within the reference window and in the on-chip memory with a high frequency. In another aspect, selective methods are provided to recode compressed video data. The methods selectively apply re-quantization and motion compensation to the residual error between frames of the bitstream based on the amount of motion in the video data.

Efficient methods of performing motion compensation based decoding and recoding of compressed video bitstreams

A data storage system ( ) includes multiple storage devices arranged in an array. A column in the array includes storage devices ( ) mounted on a tray ( ). The storage devices ( ) and the tray ( ) form an air channel ( ) for efficient heat dissipation. The data storage system ( ) may include multiple columns inserted in multiple slots of a chassis ( ), thereby forming a memory board.

Data storage system

An interrupt steering architecture that enables an intelligent peripheral device to process interrupts from PCI devices associated with a PCI bus is disclosed. The interrupt steering architecture enables the PCI interrupt signals to be steered to either a host CPU or to an intelligent peripheral device. The interrupt steering architecture is wholly compliant with the PCI bus specification and does not utilize additional sideband signals. The interrupt steering architecture is under user control and can be set by the user at system initialization or reset.

PCI-compliant interrupt steering architecture

A mechanism that automatically configures the manner in which interrupt signals are shared in order to avoid system failures and improves the system performance is herein disclosed. The mechanism executes as part of the system BIOS during system initialization or reset. The mechanism utilizes information found in the configuration register space to determine the characteristics of the device. The device characteristics are used to determine which devices share IRQ signals. In this manner, devices that cause system failures due to sharing interrupt signals are not assigned a common interrupt signal thereby minimizing system failures and improving the overall system performance.

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San Jose, CA, United States of America

Jiangang Ding