Boe Technology Group Co., Ltd.

Beijing Boe Technology Development Co., Ltd.

Beijing Boe Display Technology Co., Ltd.

Boe Technology Groupco., Ltd.

Hefei Boe Joint Technology Co., Ltd.

Chengdu Boe Optoelectronics Technology Co., Ltd.

Jianbo Xian

Yong Qiao

Hongfei Cheng

Yongda Ma

Pan Li

Wenbo Li

Xinyin Wu

Jian Xu

Yongchun Lu

Xueguang Hao

Hui Li

Chunping Long

Chen Hui Xu

Yuxin Zhang

Jingbo Xu

Jiantao Liu

Fei Yang

Ce Ning

Song Meng

Lizhong Wang

Liping Lei

Yong Hu

Yunping Di

Binbin Tong

Xibin Shao

Zhihua Sun

Yanping Liao

Yue Yang

Yinlong Zhang

Xiaolong Wei

Guangcai Yuan

Jian Li

Wei Qin

Yi Chen

Xiangxiang Zou

Dongchuan Chen

Qiujie Su

Shuai Hou

Yingyi Li

Tangxiang Wang

Masakazu Okamura

Kailiang Zhang

Zhen Zhang

Yuanzhang Zhu

Lingdan Bo

Xuesong Tian

Xingchen Shangguan

Zhiqiang Dong

Chen Xu

Hongfel Cheng

Provided is a display panel. In the display panel, a plurality of first drive units included in a first drive circuit can output gate driving signals based on a turn-on signal provided by a first turn-on line coupled with the first drive units. A plurality of second drive units included in a second drive circuit can output gate driving signals based on a turn-on signal provided by a second turn-on line coupled with the second drive units. First gating units can control on-off between the corresponding first drive units and one part of pixels based on an enable signal provided by a first enable line coupled with the first gating units. Second gating units can control on-off between the corresponding second drive units and the other part of the pixels based on an enable signal provided by a second enable line coupled with the second gating units.

Display panel, method for display control therefor, and display device

A display driving method and a display device are provided. The display driving method includes: scanning a plurality of subpixels arranged in an NΔM array row by row or in multiple rows to turn on each row of scanned subpixels, so that the duration when two adjacent rows of subpixels are simultaneously in a turn-on state is greater than or equal to two times a unit scan time, the unit scan time being the time required for scanning one row of subpixels, and N and M both being integers greater than 1; and applying data signals to at least two rows of subpixels that are simultaneously in the turn-on state, so that the duration when data signals are applied to at least some rows of subpixels is greater than the unit scan time.

Display driving method for increasing charging duration and display device

An array substrate and a display panel. The array substrate includes: a base substrate; a gate line and a data line on the base substrate, the gate line intersect the data line to define a pixel region; a metal oxide thin film transistor is arranged in the pixel region, the metal oxide thin film transistor includes a metal oxide semiconductor layer; the metal oxide semiconductor layer includes a first part and a second part; the first part and the data line are connected through a first via hole; the first part is in a stripe shape; a first included angle is between extension directions of the first part and the data line; an orthographic projection of the second part overlap with an orthographic projection of the gate line on the base substrate and do not overlap with an orthographic projection of the data line on the base substrate.

Array substrate and display panel

At least one embodiment of the present disclosure provides a display panel, and the display panel includes: a first substrate and a second substrate oppositely combined with each other, the first substrate includes a base substrate, and a gate line, a first electrode, a first interlayer insulating layer, and second electrode on the base substrate; the first interlayer insulating layer includes a first via hole penetrating through the first interlayer insulating layer, the second electrode is electrically connected to the first electrode the first via hole, first support structure is provided in a region corresponding to the first via hole and on a side of the second electrode away from the base substrate; at least a part of the first support structure is located in the first via hole, an orthographic projection of the first via hole overlaps with an orthographic projection of the gate line on the base substrate.

Display panel having support structures being formed in via holes of the interlayer insulating layer

The disclosure provides a display panel and a display device. The display panel includes: a base substrate, a transistor array layer, a pixel defining layer, touch electrodes. The area of opening region of first color sub-pixel is smaller than that of opening region of third color sub-pixel, the area of opening region of second color sub-pixel is smaller than that of opening region of third color sub-pixel. An orthogonal projection of second capacitor in first color sub-pixel and an orthogonal projection of touch electrodes have a first auxiliary overlap area, an orthogonal projection of second capacitor in second color sub-pixel and orthogonal projection of the touch electrodes have a second auxiliary overlap area, an orthogonal projection of second capacitor in third color sub-pixel and orthogonal projection of touch electrodes have a third auxiliary overlap area. The first and/or second auxiliary overlap area is larger than the third auxiliary overlap area.

Display panel and display device

Provided is a substrate. The substrate includes a base substrate; and a plurality of sub-pixel structures arranged in an array on the base substrate, wherein the sub-pixel structure comprises: a thin film transistor disposed on the base substrate, the thin film transistor comprising a source and a drain; an insulating layer disposed on a side of the thin film transistor distal from the base substrate, a first via hole being formed in the insulating layer; a pixel electrode disposed on a side of the insulating layer distal from the base substrate, the pixel electrode being electrically connected to either the source or the drain through the first via hole; and a filling block disposed at the first via hole.

Substrate, method for manufacturing same, and display panel

Provided is an array substrate, including: a display region including signal lines and a peripheral region including a bonding region; wherein the bonding region includes at least one row of signal line input terminals disposed on a first substrate, the signal line input terminals being electrically connected to the signal lines; and the signal line input terminal includes an etched conductive layer, at least the etched conductive layers in two adjacent signal line input terminals disposed in a same row being disposed on different layers.

Array substrate, display panel, and display device

Embodiments of the present disclosure provide a display panel and a display device. The display panel includes: a base substrate including a non-display area; a gate drive circuit located in the non-display area, where the gate drive circuit includes a plurality of shift registers, and the plurality of shift registers are divided into a plurality of register sets; and a plurality of signal lead-in lines located in the non-display area, where the plurality of signal lead-in lines are divided into a plurality of line sets, a frame start signal end of one register set is correspondingly and electrically connected to one line set, and two signal lead-in lines of one line set are provided with the signal lead-in line of another line set therebetween.

A method for sensing a display panel includes: sensing an electrical characteristic parameter of a driving transistor of a pixel circuit of a sub-pixel in an X-th row in a blank stage between an N-th frame and an (N+1)-th frame, wherein X is a random number, and both N and X are positive integers.

Method for sensing display panel, and display panel

An array substrate and a display device are disclosed. The array substrate includes a base substrate, a plurality of gate lines and a plurality of data lines arranged to intersect each other on the base substrate, a pixel electrode arranged in a region defined by an adjacent gate line and an adjacent data line, and a thin film transistor arranged at an intersection of the gate lines and the data lines. A drain of the thin film transistor is connected with the pixel electrode through a via hole. The gate lines further include a widening portion between adjacent data lines. The widening portion comprises a recess structure. An orthogonal projection of the recess structure on the base substrate at least partly overlaps that of the drain of the thin film transistor on the base substrate.

Array substrate and display device

An organic light-emitting diode display panel and a sensing method and a driving method therefor are provided. The organic light-emitting diode display panel includes a plurality of pixel units arranged in an array, each pixel unit includes a plurality of sub-pixels, and at least two sub-pixels are connected to a same sensing signal line. The sensing method includes: sequentially applying sensing data signals to the sub-pixels in the organic light-emitting diode display panel, and sequentially outputting sensing signals through sensing signal lines, to sense the sub-pixels, so as to compensate the sub-pixels. Among the sub-pixels connected to the same sensing signal line, sub-pixels, other than a sub-pixel which is currently sensed, are applied with a zero-gray-scale data signal.

Display panel and sensing method and driving method therefor

A data driving integrated circuit includes a digital-to-analog converter configured to receive a respective digital data signal from a timing controller and convert the respective digital data signal to a respective analog data signal, which is output to a display panel through a respective data line; an analog-to-digital converter configured to receive a respective analog sensing signal from a respective sensing line in the display panel and convert respective analog sensing signal to a respective digital sensing signal, which is output to the timing controller; a first sensing switch configured to control a connection between a first reference voltage line and the respective sensing line; a second sensing switch configured to control a connection between a second reference voltage line and the respective sensing line; and a third sensing switch configured to control the connection between the analog-to-digital converter and the respective sensing line.

Data driving integrated circuit, display apparatus, and pixel compensation method

The present disclosure provides a compensation control method and a display device. The method includes in a standstill phase, controlling the display panel to stand still; after the standstill phase ends, sensing, by the timing controller, characteristic values of each row of the pixel circuits in the display panel in a time division manner by controlling the gate driver and the source driver; setting a black insertion time period between time periods for sensing characteristic values of different rows of pixel circuits, during the black insertion time period, controlling, by the timing controller, the gate driver and the source driver, to display a black picture on the display panel.

Compensation control method and display device

An array substrate () and a display device () are provided, and the array substrate includes a base substrate () and includes a pixel array () and an auxiliary conductive structure () which are on the base substrate (); the pixel array includes a plurality of pixel units () arranged in an array and a plurality of pixel electrodes (), and each of the plurality of pixel units () includes at least one of the plurality of pixel electrodes (); the auxiliary conductive structure () surrounds at least one of the plurality of pixel electrodes () and is insulated from the plurality of pixel electrodes (); a resistivity of a material of the auxiliary conductive structure () is less than or equal to a resistivity of a material of the at least one of the plurality of the pixel electrodes (). The auxiliary conductive structure () receives and transmits interfering charges around the pixel electrode (), so that the interfering charges are kept away from the pixel electrode (), and thereby interference of the interfering charges on the pixel electrode () is prevented or reduced.

A liquid crystal display panel includes an array substrate and an opposite substrate that are disposed opposite to each other; the liquid crystal display panel has a display region and at least one non-display region disposed beside the display region. The array substrate is of a multi-layer structure and includes a pixel electrode layer and a plurality of protrusions disposed in the at least one non-display region, and the opposite substrate includes a common electrode layer. A protrusion has a structure including at least one film, and a film of the at least one film is located in a layer included in the array substrate.

Liquid crystal display panel, and liquid crystal display device

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Beijing, China

Jianbo Xian