Boe Technology Group Co., Ltd.

Jian Min

Xiaolong Li

Zhengyin Xu

Dong Li

Tao Gao

Youwei Wang

Ping Song

Zheng Liu

Shuai Zhang

Feifei Wang

Peng Cai

Huijuan Zhang

Liangjian Li

The present application discloses a method of fabricating a polycrystalline silicon thin film transistor, the method including forming an amorphous silicon layer on a base substrate having a pattern corresponding to a polycrystalline silicon active layer of the thin film transistor; the amorphous silicon layer having a first region corresponding to a source electrode and drain electrode contact region in the polycrystalline silicon active layer and a second region corresponding to a channel region in the polycrystalline silicon active layer; forming a first dopant layer on a side of the second region distal to the base substrate; forming a second dopant layer on a side of the first region distal to the base substrate; and crystallizing the amorphous silicon layer, the first dopant layer, and the second dopant layer to form the polycrystalline silicon active layer, the polycrystalline silicon active layer being doped with a dopant of the first dopant layer in the second region and doped with a dopant of the second dopant layer in the first region during the step of crystallizing the amorphous silicon layer.

Polycrystalline silicon thin film transistor and method of fabricating the same, and display apparatus

A thin film transistor, a method for fabricating the same, an array substrate, and a display device are provided. The method comprises forming an active layer on a substrate, wherein source-and-drain-to-be-formed regions of the active layer are thicker than a semiconductor region between the source-and-drain-to-be-formed regions, and by a patterning process, forming a gate on the active layer, and forming a pattern of source and drain in the source-and-drain-to-be-formed regions of the active layer.

Thin film transistor, method for fabricating the same, array substrate, and display device

The present disclosure provides a TFT, its manufacturing method, an array substrate and a display device. The method includes steps of: forming a pattern of a gate electrode on a base substrate; forming a gate insulation layer with an even surface; forming a pattern of a polysilicon semiconductor layer; and forming patterns of a source electrode and a drain electrode. The step of forming the pattern of the polysilicon semiconductor layer includes: crystallizing the amorphous silicon layer, so as to form the polysilicon semiconductor layer.

Thin film transistor, method for manufacturing the same, array substrate, and display device

The disclosure provides a display panel and a method for manufacturing the same. The display panel includes: an underlying substrate; thin film transistors, a light emission layer, a first inorganic moisture-blocking layer successively arranged on the underlying substrate; an organic buffer layer arranged on the first inorganic moisture-blocking layer, the organic buffer layer comprises: droplet micro-structures for decentralizing a stress on the organic buffer layer; a second inorganic moisture-blocking layer arranged on the organic buffer layer; and a blocking layer, and a glass cover plate successively arranged on the second inorganic moisture-blocking layer.

Display panel having organic buffer layer including droplet micro-structures for decentralizing stress and method for manufacturing the same

A method for processing a polysilicon thin film and a method for fabricating a thin film transistor are provided. The method for processing a polysilicon thin film includes: etching the polysilicon thin film using etching particles. An angle between an incident direction of the etching particles and the polysilicon thin film is larger than 0&#xb0; and less than 90&#xb0;.

Method for processing polysilicon thin film and method for fabricating thin film transistor

A low temperature poly-silicon thin film transistor and a manufacturing method thereof are disclosed. The method includes forming an active layer on a base substrate, forming an ohmic contact layer on the active layer through an atomic layer deposition process, and forming a source electrode and a drain electrode on the ohmic contact layer. The ohmic contact layer includes a plurality of conductive ionic layers and a plurality of monocrystalline silicon layers/poly-silicon layers. The source electrode and the drain electrode are in contact with the active layer through the ohmic contact layer.

Low temperature poly-silicon thin film transistor and manufacturing method thereof

A manufacturing method and apparatus of low temperature polycrystalline silicon, and a polycrystalline silicon are provided. The manufacturing method of low temperature polycrystalline silicon includes forming an amorphous silicon layer on a substrate; scanning the amorphous silicon layer by using a laser to emit a strip-shaped laser beam to go through a mask which includes transmissive stripes and partially-transmissive stripes arranged alternately, to form low temperature fusion regions and high temperature fusion regions which are arranged alternately on the amorphous silicon layer; recrystallizing the amorphous silicon layer from the low temperature fusion regions to the high temperature fusion regions.

Growing community of inventors

Beijing, China

Jian Min