Lenovo (singapore) Pte. Ltd.

International Business Machines Corporation

Lumentum Operations LLC

Jian Meng

Donald Richard Dignam

Stephen John Flint

Eric Rong Ao

Alexander Philip Campbell

Anthony E Baker

Rong Eric Ao

Harvey Hum

Don R Dignam

Georges Turcotte

Christian Savard

Georges Pierre Turcotte

Fred Roberts

An optical module may include an optical subassembly having a receptacle. The receptacle may have a first diameter. The optical module may include a housing having a circular opening for receiving the receptacle. The circular opening may have a second diameter. The first diameter and the second diameter may be sized to reduce electromagnetic interference at a cut-off frequency from the optical module. The cut-off frequency may be defined by a data rate of at least one component of the optical module.

Electromagnetic interference emission reduction for optical modules

A device, according to one embodiment, includes a fuse, and a resistor electrically coupled directly to the fuse in series therewith. A hybrid device, according to another embodiment, includes a fuse, and a resistor electrically coupled directly to the fuse in series therewith in a single package. A resistance of the resistor is 1 ohm or less, and is substantially temperature insensitive.

Resistor and fuse overcurrent protection device

A method according to one embodiment includes receiving a printed circuit board design in a memory; generating, using a processor, multiple schematic windows and multiple layout windows of the printed circuit board design; outputting a layout window depicting an entire layout of the printed circuit board design, receiving a user selection of a sub-portion of the printed circuit board design from the entire layout of the printed circuit board design, generating a first of multiple layout windows and a first of multiple schematic windows upon receiving the user selection, and outputting the multiple schematic windows of the printed circuit board design simultaneously with outputting the multiple layout windows of the printed circuit board design. The first of the schematic windows is paired with the first of the layout windows, the paired windows depicting representations of the selected sub-portion of the printed circuit board design.

Viewing multi paired schematic and layout windows on printed circuit board (PCB) design software and tools

An apparatus for testing electrical characteristics of a device, having one or more testing sites. The apparatus comprises a nonconductive plate having a through-hole. The through-hole is positioned such that it at least partially overlays one of the one or more testing sites when at least a portion of the bottom surface of the nonconductive plate is adjacent to the device to be tested. The apparatus also comprises a probe positioning body protruding from the top surface of the nonconductive plate and having a through-hole. The probe positioning body is positioned such that the through-hole of the probe positioning body at least partially aligns with the through-hole of the nonconductive plate.

Probe supporting and aligning apparatus

An electronic system includes a multiple POL regulators that supply a regulated voltage to a component within the electronic system. A phase spreading scheme may be implemented so that the POL regulators operate under various phases to reduce voltage noise, high input capacitance, and high radiated emissions. One phase spreading scheme includes a single POL regulator controlling phase spreading so that the other POL regulators operate under different phases. Another phase spreading scheme includes an upstream POL regulator determining a phase offset that may be passed to a downstream POL regulator so that the downstream POL regulator may operate under a different phase relative to the upstream POL regulator.

Point of load regulator synchronization and phase offset

A differential transmission line includes a positive conductor on which a positive complementary component of a differential signal is transmitted, and a negative conductor parallel to the positive conductor on which a negative complementary component of the differential signal is transmitted. A quarter wavelength differential coupler is inserted along a length of the positive and negative conductors. The quarter wavelength differential coupler has a length corresponding to a frequency of common mode noise on the positive and negative conductors. The quarter wavelength differential coupler reduces the common mode noise at the frequency as the differential signal passes through the quarter wavelength differential coupler.

Differential transmission line having quarter wavelength differential coupler to reduce common mode noise

A high bandwidth signal probe device and a method of probing a high bandwidth signal are provided. The high bandwidth signal probe device includes a probe tip for probing a stub of a backdrilled via of a printed circuit board. The probe tip is adapted to fit in the backdrilled via. The probe tip has a length adapted to reach the stub of the backdrilled via. The probe tip is adapted to contact a plated portion of the stub of the backdrilled via. A resistive element is associated with the probe tip. The method includes inserting a probe tip of a signal probe device in the backdrilled via, placing the probe tip in contact with a plated portion of the stub of the backdrilled via, and receiving an electrical signal through a path which includes a resistive element of the probe tip of the signal probe device.

High bandwidth signal probe tip

An inter-circuit board connector connects a first circuit board to a second circuit board. The inter-circuit board connector includes power pins to transmit power from the first circuit board to the second circuit board. Each power pin provides an equal amount of current from the first circuit board to the second circuit board. The inter-circuit board connector includes a current sensor to measure current on a selected number of the power pins that can be less than a total number of the power pins.

Inter-circuit board connector with current sensor

An optical element conveying human-discernible information to a user has its brightness modulated to also convey machine-discernible information to an optical detector. A frame section in which a bit of data can be conveyed begins at a falling edge of a preceding frame section corresponding to the brightness of the optical element decreasing to a low level. At a first predetermined point within the frame section, if the bit of data is logic one, the brightness is increased to a high level, corresponding to a rising edge. At a later, second predetermined point within the frame section, if the bit of data is logic zero, the brightness is increased to the high level, corresponding to the rising edge. At the end of the frame section, the brightness is decreased to the low level, corresponding to a falling edge of the frame section.

Modulating brightness of optical element conveying human-discernible information to also convey machine-discernible information

A current detector senses current flowing through a conductor, such as a conductive trace of a circuit board, without being placed in series with the conductor. A first magnetically conductive partial ring is located above the conductor, and a second magnetically conductive partial ring is located below the conductor. Ends of one of the partial rings may be inserted through holes of the circuit board to either side of the conductive trace. The partial rings, upon being contactively aligned with one another, form a magnetically conductive complete ring around the conductor. A Hall effect sensor disposed within one of the partial rings outputs a signal corresponding to the current flowing through the conductor.

Current detector to sense current without being in series with conductor

A differential transmission line with a common mode notch filter includes adjacently arranged, repeating differential transmission line pair sections. The sections have lengths that are each equal to half of an electric wavelength of a lowest frequency of a common mode electromagnetic wave to be suppressed during transmission of an electric signal over the differential transmission line. Each section includes a pair of conductors separated from one another by a spacing. The width of each conductor and the spacing between the conductors of each section vary over the length thereof according to a same pattern such that at every point over the length of each section a differential mode impedance of the differential transmission line is identical. A common mode impedance of the differential transmission line changes periodically in accordance with the lengths of the sections.

Differential transmission line with common mode notch filter

A clamping circuit clamps a serial data signal between a first high voltage level and a first low voltage level to yield a clamped serial data signal. A first comparator circuit compares the clamped serial data signal to a second high voltage level less than the first high voltage level to yield a high output equal to one just when a voltage of the clamped serial data signal is greater than the second high voltage level. A second comparator circuit compares the clamped serial data signal to second low voltage level greater than the first low voltage level to yield a low output equal to one just when the voltage of the clamped serial data signal is greater than the second low voltage level. An edge circuit detects an edge of the serial data signal from the high output and the low output.

Serial data signal edge detection

A system according to one embodiment includes a printed circuit board; and a connector coupled to the printed circuit board. The connector has a plurality of pins extending therefrom along a first direction. The connector has guides configured to guide a mating connector along a second direction oriented perpendicular to the first direction.

High speed circuit board to circuit board connector via mating in an orthogonal direction to the axis of the pins

A method according to one embodiment includes receiving a printed circuit board design in a memory; generating, using a processor, multiple schematic windows of the printed circuit board design; generating, using the processor, multiple layout windows of the printed circuit board design; and outputting the multiple schematic windows of the printed circuit board design simultaneously with outputting the multiple layout windows of the printed circuit board design. A first of the schematic windows is paired with a first of the layout windows, the paired windows depicting representations of a common sub-portion of the printed circuit board design.

Growing community of inventors

Kanata, Canada

Jian Meng